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usb: dwc2: Force 8bit UTMI width for Samsung Exynos SoCs

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Samsung Exynos SoCs require to force UTMI width to 8bit, otherwise the
host side of the shared USB2 PHY doesn't work.

Reported-by: Krzysztof Kozlowski <krzk@kernel.org>
Fixes: 707d80f0a3 ("usb: dwc2: gadget: Replace phyif with phy_utmi_width")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Minas Harutyunyan <hminas@synopsys.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
This commit is contained in:
Marek Szyprowski 2019-06-14 08:52:53 +02:00 committed by Felipe Balbi
parent f90db10779
commit 1112cf4c41
1 changed files with 1 additions and 0 deletions
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drivers/usb/dwc2/params.c
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@ -76,6 +76,7 @@ static void dwc2_set_s3c6400_params(struct dwc2_hsotg *hsotg)
struct dwc2_core_params *p = &hsotg->params;
p->power_down = 0;
p->phy_utmi_width = 8;
}
static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)