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drm/exynos: mixer: simplify vp_video_buffer()

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DRM core already checks in drm_atomic_plane_check() if the
pixelformat is valid. Hence we can drop the default case of
the switch statement and collapse most of the code.

Also rename the two booleans to reflect what true/false
actually means, and to avoid mixing CrCb/NV21 descriptions.

No functional change.

Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Tobias Jakobi 2017-08-22 16:19:38 +02:00 committed by Inki Dae
parent f40031c231
commit 0f75269492
1 changed files with 6 additions and 20 deletions
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26
drivers/gpu/drm/exynos/exynos_mixer.c
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@ -484,32 +484,18 @@ static void vp_video_buffer(struct mixer_context *ctx,
unsigned int priority = state->base.normalized_zpos + 1; unsigned int priority = state->base.normalized_zpos + 1;
unsigned long flags; unsigned long flags;
dma_addr_t luma_addr[2], chroma_addr[2]; dma_addr_t luma_addr[2], chroma_addr[2];
bool tiled_mode = false; bool is_tiled, is_nv21;
bool crcb_mode = false;
u32 val; u32 val;
switch (fb->format->format) { is_nv21 = (fb->format->format == DRM_FORMAT_NV21);
case DRM_FORMAT_NV12: is_tiled = (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE);
crcb_mode = false;
break;
case DRM_FORMAT_NV21:
crcb_mode = true;
break;
default:
DRM_ERROR("pixel format for vp is wrong [%d].\n",
fb->format->format);
return;
}
if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
tiled_mode = true;
luma_addr[0] = exynos_drm_fb_dma_addr(fb, 0); luma_addr[0] = exynos_drm_fb_dma_addr(fb, 0);
chroma_addr[0] = exynos_drm_fb_dma_addr(fb, 1); chroma_addr[0] = exynos_drm_fb_dma_addr(fb, 1);
if (mode->flags & DRM_MODE_FLAG_INTERLACE) { if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
__set_bit(MXR_BIT_INTERLACE, &ctx->flags); __set_bit(MXR_BIT_INTERLACE, &ctx->flags);
if (tiled_mode) { if (is_tiled) {
luma_addr[1] = luma_addr[0] + 0x40; luma_addr[1] = luma_addr[0] + 0x40;
chroma_addr[1] = chroma_addr[0] + 0x40; chroma_addr[1] = chroma_addr[0] + 0x40;
} else { } else {
@ -529,8 +515,8 @@ static void vp_video_buffer(struct mixer_context *ctx,
vp_reg_writemask(res, VP_MODE, val, VP_MODE_LINE_SKIP); vp_reg_writemask(res, VP_MODE, val, VP_MODE_LINE_SKIP);
/* setup format */ /* setup format */
val = (crcb_mode ? VP_MODE_NV21 : VP_MODE_NV12); val = (is_nv21 ? VP_MODE_NV21 : VP_MODE_NV12);
val |= (tiled_mode ? VP_MODE_MEM_TILED : VP_MODE_MEM_LINEAR); val |= (is_tiled ? VP_MODE_MEM_TILED : VP_MODE_MEM_LINEAR);
vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK); vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK);
/* setting size of input image */ /* setting size of input image */