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regulator: max8649 - fix setting extclk_freq

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The SYNC bits are BIT6 and BIT7 of MAX8649_SYNC register.
pdata->extclk_freq could be [0|1|2].
(MAX8649_EXTCLK_26MHZ|MAX8649_EXTCLK_13MHZ|MAX8649_EXTCLK_19MHZ)
It requires to left shift 6 bits to properly set extclk_freq.

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
This commit is contained in:
Axel Lin 2010-10-01 13:56:27 +08:00 committed by Liam Girdwood
parent e4a6376b3b
commit 0f69c897f3
1 changed files with 1 additions and 1 deletions
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2
drivers/regulator/max8649.c
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@ -330,7 +330,7 @@ static int __devinit max8649_regulator_probe(struct i2c_client *client,
/* set external clock frequency */
info->extclk_freq = pdata->extclk_freq;
max8649_set_bits(info->i2c, MAX8649_SYNC, MAX8649_EXT_MASK,
info->extclk_freq);
info->extclk_freq << 6);
}
if (pdata->ramp_timing) {