forked from Minki/linux
V4L/DVB (3803): Various correctness fixes to tuning.
*) Sets an additional tuner parameter (demodulator sample gain) that wasn't being set before. *) Removes the low symbol rate tuner parameter tweaks in the previous patch -- it appears those tweaks are not necessary with the demodulator sample gain set correctly. *) Cleanup and document the demodulator register initialization sequence. *) Change set_fec routine to disable FEC auto scan when a specific code rate is selected. *) Remove error message when reported FEC is invalid (which happens sometimes when the card has no signal) Signed-off-by: Yeasah Pell <yeasah at schwide.net> Signed-off-by: Andrew de Quincey <adq_dvb@lidskialf.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
Yeasah Pell
Mauro Carvalho Chehab
parent
dce1dfc2a5
commit
0e4558ab4a
@ -76,23 +76,23 @@ static struct
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.symbolrate_high = 4999999,
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/* the specs recommend other values for VGA offsets,
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but tests show they are wrong */
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.VGAprogdata = (2 << 18) | (0x180 << 9) | 0x1e0,
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.VCAprogdata = (4 << 18) | (0x07 << 9) | 0x07,
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.FILTune = 0x280 /* 0.41 V */
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.VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
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.VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07,
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.FILTune = 0x27f /* 0.41 V */
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},
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{
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.symbolrate_low = 5000000,
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.symbolrate_high = 14999999,
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.VGAprogdata = (2 << 18) | (0x180 << 9) | 0x1e0,
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.VCAprogdata = (4 << 18) | (0x07 << 9) | 0x1f,
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.VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0,
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.VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f,
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.FILTune = 0x317 /* 0.90 V */
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},
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{
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.symbolrate_low = 15000000,
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.symbolrate_high = 45000000,
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.VGAprogdata = (2 << 18) | (0x100 << 9) | 0x180,
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.VCAprogdata = (4 << 18) | (0x07 << 9) | 0x3f,
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.FILTune = 0x146 /* 2.70 V */
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.VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180,
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.VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f,
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.FILTune = 0x145 /* 2.70 V */
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},
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};
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@ -178,45 +178,44 @@ static struct {
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{
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{0x00, 0x03}, /* Reset system */
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{0x00, 0x00}, /* Clear reset */
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{0x03, 0x07},
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{0x04, 0x10},
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{0x05, 0x04},
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{0x06, 0x31},
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{0x0d, 0x02},
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{0x0e, 0x03},
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{0x0f, 0xfe},
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{0x10, 0x01},
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{0x14, 0x01},
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{0x16, 0x00},
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{0x17, 0x01},
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{0x1b, 0x05},
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{0x1c, 0x80},
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{0x1d, 0x00},
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{0x1e, 0x00},
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{0x20, 0x41},
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{0x21, 0x15},
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{0x29, 0x00},
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{0x2a, 0xb0},
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{0x2b, 0x73},
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{0x2c, 0x00},
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{0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */
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{0x04, 0x10}, /* MPEG */
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{0x05, 0x04}, /* MPEG */
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{0x06, 0x31}, /* MPEG (default) */
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{0x0b, 0x00}, /* Freq search start point (default) */
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{0x0c, 0x00}, /* Demodulator sample gain (default) */
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{0x0d, 0x02}, /* Frequency search range = Fsymbol / 4 (default) */
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{0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */
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{0x0f, 0xfe}, /* FEC search mask (all supported codes) */
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{0x10, 0x01}, /* Default search inversion, no repeat (default) */
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{0x16, 0x00}, /* Enable reading of frequency */
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{0x17, 0x01}, /* Enable EsNO Ready Counter */
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{0x1c, 0x80}, /* Enable error counter */
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{0x20, 0x00}, /* Tuner burst clock rate = 500KHz */
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{0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */
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{0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */
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{0x29, 0x00}, /* DiSEqC LNB_DC off */
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{0x2a, 0xb0}, /* DiSEqC Parameters (default) */
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{0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */
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{0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */
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{0x2d, 0x00},
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{0x2e, 0x00},
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{0x2f, 0x00},
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{0x30, 0x00},
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{0x31, 0x00},
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{0x32, 0x8c},
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{0x33, 0x00},
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{0x32, 0x8c}, /* DiSEqC Parameters (default) */
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{0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */
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{0x34, 0x00},
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{0x35, 0x03},
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{0x36, 0x02},
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{0x37, 0x3a},
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{0x3a, 0x00}, /* Enable AGC accumulator */
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{0x44, 0x00},
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{0x45, 0x00},
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{0x46, 0x05},
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{0x56, 0x41},
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{0x57, 0xff},
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{0x67, 0x83},
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{0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */
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{0x36, 0x02}, /* DiSEqC Parameters (default) */
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{0x37, 0x3a}, /* DiSEqC Parameters (default) */
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{0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */
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{0x44, 0x00}, /* Constellation (default) */
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{0x45, 0x00}, /* Symbol count (default) */
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{0x46, 0x0d}, /* Symbol rate estimator on (default) */
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{0x56, 0x41}, /* Various (default) */
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{0x57, 0xff}, /* Error Counter Window (default) */
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{0x67, 0x83}, /* Non-DCII symbol clock */
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};
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static int cx24123_writereg(struct cx24123_state* state, int reg, int data)
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@ -291,20 +290,23 @@ static int cx24123_readlnbreg(struct cx24123_state* state, u8 reg)
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static int cx24123_set_inversion(struct cx24123_state* state, fe_spectral_inversion_t inversion)
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{
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u8 nom_reg = cx24123_readreg(state, 0x0e);
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u8 auto_reg = cx24123_readreg(state, 0x10);
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switch (inversion) {
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case INVERSION_OFF:
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dprintk("%s: inversion off\n",__FUNCTION__);
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cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) & 0x7f);
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cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
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cx24123_writereg(state, 0x0e, nom_reg & ~0x80);
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cx24123_writereg(state, 0x10, auto_reg | 0x80);
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break;
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case INVERSION_ON:
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dprintk("%s: inversion on\n",__FUNCTION__);
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cx24123_writereg(state, 0x0e, cx24123_readreg(state, 0x0e) | 0x80);
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cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) | 0x80);
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cx24123_writereg(state, 0x0e, nom_reg | 0x80);
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cx24123_writereg(state, 0x10, auto_reg | 0x80);
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break;
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case INVERSION_AUTO:
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dprintk("%s: inversion auto\n",__FUNCTION__);
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cx24123_writereg(state, 0x10, cx24123_readreg(state, 0x10) & 0x7f);
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cx24123_writereg(state, 0x10, auto_reg & ~0x80);
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break;
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default:
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return -EINVAL;
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@ -332,35 +334,56 @@ static int cx24123_get_inversion(struct cx24123_state* state, fe_spectral_invers
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static int cx24123_set_fec(struct cx24123_state* state, fe_code_rate_t fec)
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{
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u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07;
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if ( (fec < FEC_NONE) || (fec > FEC_AUTO) )
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fec = FEC_AUTO;
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/* Hardware has 5/11 and 3/5 but are never unused */
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switch (fec) {
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case FEC_NONE:
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dprintk("%s: set FEC to none\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0x01);
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case FEC_1_2:
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dprintk("%s: set FEC to 1/2\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0x02);
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cx24123_writereg(state, 0x0e, nom_reg | 0x01);
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cx24123_writereg(state, 0x0f, 0x02);
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break;
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case FEC_2_3:
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dprintk("%s: set FEC to 2/3\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0x04);
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cx24123_writereg(state, 0x0e, nom_reg | 0x02);
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cx24123_writereg(state, 0x0f, 0x04);
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break;
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case FEC_3_4:
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dprintk("%s: set FEC to 3/4\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0x08);
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case FEC_5_6:
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cx24123_writereg(state, 0x0e, nom_reg | 0x03);
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cx24123_writereg(state, 0x0f, 0x08);
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break;
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case FEC_4_5:
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dprintk("%s: set FEC to 4/5\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0x20);
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case FEC_7_8:
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cx24123_writereg(state, 0x0e, nom_reg | 0x04);
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cx24123_writereg(state, 0x0f, 0x10);
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break;
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case FEC_5_6:
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dprintk("%s: set FEC to 5/6\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0x80);
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cx24123_writereg(state, 0x0e, nom_reg | 0x05);
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cx24123_writereg(state, 0x0f, 0x20);
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break;
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case FEC_6_7:
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dprintk("%s: set FEC to 6/7\n",__FUNCTION__);
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cx24123_writereg(state, 0x0e, nom_reg | 0x06);
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cx24123_writereg(state, 0x0f, 0x40);
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break;
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case FEC_7_8:
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dprintk("%s: set FEC to 7/8\n",__FUNCTION__);
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cx24123_writereg(state, 0x0e, nom_reg | 0x07);
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cx24123_writereg(state, 0x0f, 0x80);
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break;
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case FEC_AUTO:
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dprintk("%s: set FEC to auto\n",__FUNCTION__);
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return cx24123_writereg(state, 0x0f, 0xae);
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cx24123_writereg(state, 0x0f, 0xfe);
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break;
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default:
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return -EOPNOTSUPP;
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}
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return 0;
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}
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static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec)
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@ -395,16 +418,31 @@ static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec)
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*fec = FEC_7_8;
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break;
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default:
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*fec = FEC_NONE; // can't happen
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printk("FEC_NONE ?\n");
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/* this can happen when there's no lock */
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*fec = FEC_NONE;
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}
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return 0;
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}
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/* Approximation of closest integer of log2(a/b). It actually gives the
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lowest integer i such that 2^i >= round(a/b) */
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static u32 cx24123_int_log2(u32 a, u32 b)
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{
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u32 exp, nearest = 0;
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u32 div = a / b;
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if(a % b >= b / 2) ++div;
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if(div < (1 << 31))
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{
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for(exp = 1; div > exp; nearest++)
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exp += exp;
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}
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return nearest;
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}
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static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate)
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{
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u32 tmp, sample_rate, ratio;
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u32 tmp, sample_rate, ratio, sample_gain;
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u8 pll_mult;
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/* check if symbol rate is within limits */
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@ -462,7 +500,12 @@ static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate)
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cx24123_writereg(state, 0x09, (ratio >> 8) & 0xff );
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cx24123_writereg(state, 0x0a, (ratio ) & 0xff );
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dprintk("%s: srate=%d, ratio=0x%08x, sample_rate=%i\n", __FUNCTION__, srate, ratio, sample_rate);
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/* also set the demodulator sample gain */
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sample_gain = cx24123_int_log2(sample_rate, srate);
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tmp = cx24123_readreg(state, 0x0c) & ~0xe0;
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cx24123_writereg(state, 0x0c, tmp | sample_gain << 5);
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dprintk("%s: srate=%d, ratio=0x%08x, sample_rate=%i sample_gain=%d\n", __FUNCTION__, srate, ratio, sample_rate, sample_gain);
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return 0;
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}
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@ -1014,12 +1057,13 @@ static struct dvb_frontend_ops cx24123_ops = {
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.frequency_min = 950000,
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.frequency_max = 2150000,
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.frequency_stepsize = 1011, /* kHz for QPSK frontends */
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.frequency_tolerance = 29500,
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.frequency_tolerance = 5000,
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.symbol_rate_min = 1000000,
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.symbol_rate_max = 45000000,
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.caps = FE_CAN_INVERSION_AUTO |
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FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
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FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
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FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
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FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
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FE_CAN_QPSK | FE_CAN_RECOVER
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},
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