forked from Minki/linux
tg3: Assign flags to fixes in start_xmit_dma_bug
This patch adds a flag for each bug workaround in tg3_start_xmit_dma_bug(). This is prep work for the following patch. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -5124,7 +5124,8 @@ static int tigon3_dma_hwbug_workaround(struct tg3 *tp, struct sk_buff *skb,
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/* Make sure new skb does not cross any 4G boundaries.
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* Drop the packet if it does.
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*/
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if (ret || tg3_4g_overflow_test(new_addr, new_skb->len)) {
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if (ret || ((tp->tg3_flags3 & TG3_FLG3_4G_DMA_BNDRY_BUG) &&
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tg3_4g_overflow_test(new_addr, new_skb->len))) {
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if (!ret)
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skb_dma_unmap(&tp->pdev->dev, new_skb,
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DMA_TO_DEVICE);
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@ -5459,9 +5460,15 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
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would_hit_hwbug = 0;
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if (tp->tg3_flags3 & TG3_FLG3_5701_DMA_BUG)
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if ((tp->tg3_flags3 & TG3_FLG3_4G_DMA_BNDRY_BUG) &&
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tg3_4g_overflow_test(mapping, len))
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would_hit_hwbug = 1;
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else if (tg3_4g_overflow_test(mapping, len))
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if ((tp->tg3_flags3 & TG3_FLG3_40BIT_DMA_LIMIT_BUG) &&
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tg3_40bit_overflow_test(tp, mapping, len))
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would_hit_hwbug = 1;
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if (tp->tg3_flags3 & TG3_FLG3_5701_DMA_BUG)
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would_hit_hwbug = 1;
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tg3_set_txd(tnapi, entry, mapping, len, base_flags,
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@ -5482,10 +5489,12 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
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tnapi->tx_buffers[entry].skb = NULL;
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if (tg3_4g_overflow_test(mapping, len))
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if ((tp->tg3_flags3 & TG3_FLG3_4G_DMA_BNDRY_BUG) &&
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tg3_4g_overflow_test(mapping, len))
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would_hit_hwbug = 1;
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if (tg3_40bit_overflow_test(tp, mapping, len))
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if ((tp->tg3_flags3 & TG3_FLG3_40BIT_DMA_LIMIT_BUG) &&
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tg3_40bit_overflow_test(tp, mapping, len))
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would_hit_hwbug = 1;
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
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@ -12610,12 +12619,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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tp->irq_max = 1;
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#ifdef TG3_NAPI
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
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tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
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tp->irq_max = TG3_IRQ_MAX_VECS;
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}
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#endif
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if (!(tp->tg3_flags3 & TG3_FLG3_5755_PLUS)) {
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tp->tg3_flags3 |= TG3_FLG3_4G_DMA_BNDRY_BUG;
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tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
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}
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if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
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(tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
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@ -2759,6 +2759,8 @@ struct tg3 {
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#define TG3_FLG3_TOGGLE_10_100_L1PLLPD 0x00008000
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#define TG3_FLG3_PHY_IS_FET 0x00010000
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#define TG3_FLG3_ENABLE_RSS 0x00020000
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#define TG3_FLG3_4G_DMA_BNDRY_BUG 0x00080000
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#define TG3_FLG3_40BIT_DMA_LIMIT_BUG 0x00100000
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struct timer_list timer;
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u16 timer_counter;
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