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i2c-algo-bit: Fix timeout test

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When fetching DDC using i2c algo bit, we were often seeing timeouts
before getting valid EDID on a retry. The VESA spec states 2ms is the
DDC timeout, so when this translates into 1 jiffie and we are close
to the end of the time period, it could return with a timeout less than
2ms.

Change this code to use time_after instead of time_after_eq.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
This commit is contained in:
Dave Airlie 2009-05-05 08:39:24 +02:00 committed by Jean Delvare
parent 4ccc28f725
commit 0cdba07bb2
1 changed files with 1 additions and 1 deletions
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drivers/i2c/algos/i2c-algo-bit.c
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@ -104,7 +104,7 @@ static int sclhi(struct i2c_algo_bit_data *adap)
* chips may hold it low ("clock stretching") while they * chips may hold it low ("clock stretching") while they
* are processing data internally. * are processing data internally.
*/ */
if (time_after_eq(jiffies, start + adap->timeout)) if (time_after(jiffies, start + adap->timeout))
return -ETIMEDOUT; return -ETIMEDOUT;
cond_resched(); cond_resched();
} }