drm/i915/pmu: Add interrupt count metric

For clients like intel-gpu-overlay it is easier to read the
count via the perf API than having to parse /proc.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171121181852.16128-7-tvrtko.ursulin@linux.intel.com
This commit is contained in:
Tvrtko Ursulin 2017-11-21 18:18:50 +00:00
parent b3add01ee2
commit 0cd4684d6e
2 changed files with 26 additions and 1 deletions

View File

@ -277,6 +277,22 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
return HRTIMER_RESTART; return HRTIMER_RESTART;
} }
static u64 count_interrupts(struct drm_i915_private *i915)
{
/* open-coded kstat_irqs() */
struct irq_desc *desc = irq_to_desc(i915->drm.pdev->irq);
u64 sum = 0;
int cpu;
if (!desc || !desc->kstat_irqs)
return 0;
for_each_possible_cpu(cpu)
sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
return sum;
}
static void i915_pmu_event_destroy(struct perf_event *event) static void i915_pmu_event_destroy(struct perf_event *event)
{ {
WARN_ON(event->parent); WARN_ON(event->parent);
@ -343,6 +359,8 @@ static int i915_pmu_event_init(struct perf_event *event)
if (INTEL_GEN(i915) < 6) if (INTEL_GEN(i915) < 6)
ret = -ENODEV; ret = -ENODEV;
break; break;
case I915_PMU_INTERRUPTS:
break;
default: default:
ret = -ENOENT; ret = -ENOENT;
break; break;
@ -392,6 +410,9 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
div_u64(i915->pmu.sample[__I915_SAMPLE_FREQ_REQ].cur, div_u64(i915->pmu.sample[__I915_SAMPLE_FREQ_REQ].cur,
FREQUENCY); FREQUENCY);
break; break;
case I915_PMU_INTERRUPTS:
val = count_interrupts(i915);
break;
} }
} }
@ -654,6 +675,8 @@ static struct attribute *i915_pmu_events_attrs[] = {
I915_EVENT(actual-frequency, I915_PMU_ACTUAL_FREQUENCY, "MHz"), I915_EVENT(actual-frequency, I915_PMU_ACTUAL_FREQUENCY, "MHz"),
I915_EVENT(requested-frequency, I915_PMU_REQUESTED_FREQUENCY, "MHz"), I915_EVENT(requested-frequency, I915_PMU_REQUESTED_FREQUENCY, "MHz"),
I915_EVENT_ATTR(interrupts, I915_PMU_INTERRUPTS),
NULL, NULL,
}; };

View File

@ -139,7 +139,9 @@ enum drm_i915_pmu_engine_sample {
#define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0) #define I915_PMU_ACTUAL_FREQUENCY __I915_PMU_OTHER(0)
#define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1) #define I915_PMU_REQUESTED_FREQUENCY __I915_PMU_OTHER(1)
#define I915_PMU_LAST I915_PMU_REQUESTED_FREQUENCY #define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2)
#define I915_PMU_LAST I915_PMU_INTERRUPTS
/* Each region is a minimum of 16k, and there are at most 255 of them. /* Each region is a minimum of 16k, and there are at most 255 of them.
*/ */