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net: dsa: felix: stop clearing CPU flooding in felix_setup_tag_8021q

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felix_migrate_flood_to_tag_8021q_port() takes care of clearing the
flooding bits on the old CPU port (which was the CPU port module), so
manually clearing this bit from PGID_UC, PGID_MC, PGID_BC is redundant.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Vladimir Oltean 2022-03-02 21:14:16 +02:00 committed by David S. Miller
parent 90897569be
commit 0cc369800e
1 changed files with 0 additions and 10 deletions
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10
drivers/net/dsa/ocelot/felix.c
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@ -465,7 +465,6 @@ static int felix_update_trapping_destinations(struct dsa_switch *ds,
static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu, bool change)
{
struct ocelot *ocelot = ds->priv;
unsigned long cpu_flood;
struct dsa_port *dp;
int err;
@ -487,15 +486,6 @@ static int felix_setup_tag_8021q(struct dsa_switch *ds, int cpu, bool change)
ANA_PORT_CPU_FWD_BPDU_CFG, dp->index);
}
/* In tag_8021q mode, the CPU port module is unused, except for PTP
* frames. So we want to disable flooding of any kind to the CPU port
* module, since packets going there will end in a black hole.
*/
cpu_flood = ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports));
ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_UC);
ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_MC);
ocelot_rmw_rix(ocelot, 0, cpu_flood, ANA_PGID_PGID, PGID_BC);
err = dsa_tag_8021q_register(ds, htons(ETH_P_8021AD));
if (err)
return err;