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Merge branch 'pci/misc'

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- Convert PCIe capability PCIBIOS errors to errno (Bolarinwa Olayemi
  Saheed)

- Align PCIe capability and PCI accessor return values (Bolarinwa Olayemi
  Saheed)

- Replace http:// links with https:// (Alexander A. Klimov)

- Replace lkml.org, spinics, gmane with lore.kernel.org (Bjorn Helgaas)

- Update panic message to mention kzalloc(), not kmalloc() (Liao Pingfang)

- Move PCI_VENDOR_ID_REDHAT definition to pci_ids.h (Huacai Chen)

- Remove unused pci_lost_interrupt() (Heiner Kallweit)

* pci/misc:
  PCI: Remove unused pci_lost_interrupt()
  PCI: Move PCI_VENDOR_ID_REDHAT definition to pci_ids.h
  PCI: Fix error in panic message
  PCI: Replace lkml.org, spinics, gmane with lore.kernel.org
  PCI: Replace http:// links with https://
  PCI: Align PCIe capability and PCI accessor return values
  PCI: Convert PCIe capability PCIBIOS errors to errno
This commit is contained in:
Bjorn Helgaas
2020-08-05 18:24:16 -05:00
parent e8c4a76524 2167c40657
commit 0caa17f5f2
28 changed files with 61 additions and 104 deletions
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18
drivers/pci/quirks.c
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@@ -3549,7 +3549,7 @@ static void quirk_no_bus_reset(struct pci_dev *dev)
* The device will throw a Link Down error on AER-capable systems and
* regardless of AER, config space of the device is never accessible again
* and typically causes the system to hang or reset when access is attempted.
* http://www.spinics.net/lists/linux-pci/msg34797.html
* https://lore.kernel.org/r/20140923210318.498dacbd@dualc.maya.org/
*/
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
@@ -4378,9 +4378,9 @@ static int pci_acs_ctrl_enabled(u16 acs_ctrl_req, u16 acs_ctrl_ena)
* redirect (CR) since all transactions are redirected to the upstream
* root complex.
*
* http://permalink.gmane.org/gmane.comp.emulators.kvm.devel/94086
* http://permalink.gmane.org/gmane.comp.emulators.kvm.devel/94102
* http://permalink.gmane.org/gmane.comp.emulators.kvm.devel/99402
* https://lore.kernel.org/r/201207111426.q6BEQTbh002928@mail.maya.org/
* https://lore.kernel.org/r/20120711165854.GM25282@amd.com/
* https://lore.kernel.org/r/20121005130857.GX4009@amd.com/
*
* 1002:4385 SBx00 SMBus Controller
* 1002:439c SB7x0/SB8x0/SB9x0 IDE Controller
@@ -4620,11 +4620,11 @@ static int pci_quirk_al_acs(struct pci_dev *dev, u16 acs_flags)
*
* 0x9d10-0x9d1b PCI Express Root port #{1-12}
*
* [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html
* [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html
* [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html
* [4] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html
* [5] http://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html
* [1] https://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html
* [2] https://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html
* [3] https://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html
* [4] https://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-spec-update.html
* [5] https://www.intel.com/content/www/us/en/chipsets/200-series-chipset-pch-datasheet-vol-1.html
* [6] https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-u-y-processor-lines-i-o-spec-update.html
* [7] https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-mobile-u-y-processor-lines-i-o-datasheet-vol-1.html
*/