forked from Minki/linux
x86, fpu: Consolidate inline asm routines for saving/restoring fpu state
Consolidate x86, x86_64 inline asm routines saving/restoring fpu state using config_enabled(). Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Link: http://lkml.kernel.org/r/1343171129-2747-3-git-send-email-suresh.b.siddha@intel.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
This commit is contained in:
Suresh Siddha
H. Peter Anvin
parent
050902c011
commit
0ca5bd0d88
@ -97,34 +97,24 @@ static inline void sanitize_i387_state(struct task_struct *tsk)
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__sanitize_i387_state(tsk);
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}
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#ifdef CONFIG_X86_64
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static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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{
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int err;
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#define check_insn(insn, output, input...) \
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({ \
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int err; \
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asm volatile("1:" #insn "\n\t" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: movl $-1,%[err]\n" \
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" jmp 2b\n" \
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".previous\n" \
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_ASM_EXTABLE(1b, 3b) \
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: [err] "=r" (err), output \
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: "0"(0), input); \
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err; \
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})
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/* See comment in fxsave() below. */
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#ifdef CONFIG_AS_FXSAVEQ
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asm volatile("1: fxrstorq %[fx]\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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: [fx] "m" (*fx), "0" (0));
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#else
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asm volatile("1: rex64/fxrstor (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err)
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: [fx] "R" (fx), "m" (*fx), "0" (0));
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#endif
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return err;
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static inline int fsave_user(struct i387_fsave_struct __user *fx)
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{
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return check_insn(fnsave %[fx]; fwait, [fx] "=m" (*fx), "m" (*fx));
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}
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static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
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@ -140,61 +130,66 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
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if (unlikely(err))
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return -EFAULT;
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/* See comment in fxsave() below. */
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#ifdef CONFIG_AS_FXSAVEQ
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asm volatile("1: fxsaveq %[fx]\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err), [fx] "=m" (*fx)
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: "0" (0));
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#else
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asm volatile("1: rex64/fxsave (%[fx])\n\t"
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"2:\n"
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".section .fixup,\"ax\"\n"
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"3: movl $-1,%[err]\n"
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" jmp 2b\n"
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".previous\n"
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_ASM_EXTABLE(1b, 3b)
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: [err] "=r" (err), "=m" (*fx)
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: [fx] "R" (fx), "0" (0));
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#endif
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if (unlikely(err) &&
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__clear_user(fx, sizeof(struct i387_fxsave_struct)))
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err = -EFAULT;
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/* No need to clear here because the caller clears USED_MATH */
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return err;
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if (config_enabled(CONFIG_X86_32))
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return check_insn(fxsave %[fx], [fx] "=m" (*fx), "m" (*fx));
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else if (config_enabled(CONFIG_AS_FXSAVEQ))
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return check_insn(fxsaveq %[fx], [fx] "=m" (*fx), "m" (*fx));
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/* See comment in fpu_fxsave() below. */
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return check_insn(rex64/fxsave (%[fx]), "=m" (*fx), [fx] "R" (fx));
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}
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static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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{
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if (config_enabled(CONFIG_X86_32))
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return check_insn(fxrstor %[fx], "=m" (*fx), [fx] "m" (*fx));
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else if (config_enabled(CONFIG_AS_FXSAVEQ))
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return check_insn(fxrstorq %[fx], "=m" (*fx), [fx] "m" (*fx));
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/* See comment in fpu_fxsave() below. */
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return check_insn(rex64/fxrstor (%[fx]), "=m" (*fx), [fx] "R" (fx),
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"m" (*fx));
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}
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static inline int frstor_checking(struct i387_fsave_struct *fx)
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{
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return check_insn(frstor %[fx], "=m" (*fx), [fx] "m" (*fx));
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}
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static inline void fpu_fxsave(struct fpu *fpu)
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{
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/* Using "rex64; fxsave %0" is broken because, if the memory operand
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uses any extended registers for addressing, a second REX prefix
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will be generated (to the assembler, rex64 followed by semicolon
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is a separate instruction), and hence the 64-bitness is lost. */
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#ifdef CONFIG_AS_FXSAVEQ
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/* Using "fxsaveq %0" would be the ideal choice, but is only supported
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starting with gas 2.16. */
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__asm__ __volatile__("fxsaveq %0"
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: "=m" (fpu->state->fxsave));
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#else
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/* Using, as a workaround, the properly prefixed form below isn't
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accepted by any binutils version so far released, complaining that
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the same type of prefix is used twice if an extended register is
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needed for addressing (fix submitted to mainline 2005-11-21).
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asm volatile("rex64/fxsave %0"
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: "=m" (fpu->state->fxsave));
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This, however, we can work around by forcing the compiler to select
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an addressing mode that doesn't require extended registers. */
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asm volatile("rex64/fxsave (%[fx])"
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: "=m" (fpu->state->fxsave)
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: [fx] "R" (&fpu->state->fxsave));
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#endif
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if (config_enabled(CONFIG_X86_32))
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asm volatile( "fxsave %[fx]" : [fx] "=m" (fpu->state->fxsave));
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else if (config_enabled(CONFIG_AS_FXSAVEQ))
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asm volatile("fxsaveq %0" : "=m" (fpu->state->fxsave));
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else {
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/* Using "rex64; fxsave %0" is broken because, if the memory
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* operand uses any extended registers for addressing, a second
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* REX prefix will be generated (to the assembler, rex64
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* followed by semicolon is a separate instruction), and hence
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* the 64-bitness is lost.
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*
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* Using "fxsaveq %0" would be the ideal choice, but is only
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* supported starting with gas 2.16.
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*
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* Using, as a workaround, the properly prefixed form below
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* isn't accepted by any binutils version so far released,
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* complaining that the same type of prefix is used twice if
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* an extended register is needed for addressing (fix submitted
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* to mainline 2005-11-21).
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*
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* asm volatile("rex64/fxsave %0" : "=m" (fpu->state->fxsave));
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*
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* This, however, we can work around by forcing the compiler to
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* select an addressing mode that doesn't require extended
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* registers.
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*/
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asm volatile( "rex64/fxsave (%[fx])"
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: "=m" (fpu->state->fxsave)
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: [fx] "R" (&fpu->state->fxsave));
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}
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}
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#ifdef CONFIG_X86_64
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int ia32_setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
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compat_sigset_t *set, struct pt_regs *regs);
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@ -203,28 +198,6 @@ int ia32_setup_frame(int sig, struct k_sigaction *ka,
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#else /* CONFIG_X86_32 */
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/* perform fxrstor iff the processor has extended states, otherwise frstor */
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static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
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{
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/*
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* The "nop" is needed to make the instructions the same
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* length.
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*/
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alternative_input(
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"nop ; frstor %1",
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"fxrstor %1",
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X86_FEATURE_FXSR,
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"m" (*fx));
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return 0;
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}
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static inline void fpu_fxsave(struct fpu *fpu)
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{
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asm volatile("fxsave %[fx]"
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: [fx] "=m" (fpu->state->fxsave));
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}
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#define ia32_setup_frame __setup_frame
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#define ia32_setup_rt_frame __setup_rt_frame
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@ -272,17 +245,14 @@ static inline int __save_init_fpu(struct task_struct *tsk)
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return fpu_save_init(&tsk->thread.fpu);
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}
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static inline int fpu_fxrstor_checking(struct fpu *fpu)
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{
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return fxrstor_checking(&fpu->state->fxsave);
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}
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static inline int fpu_restore_checking(struct fpu *fpu)
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{
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if (use_xsave())
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return fpu_xrstor_checking(fpu);
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return fpu_xrstor_checking(&fpu->state->xsave);
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else if (use_fxsr())
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return fxrstor_checking(&fpu->state->fxsave);
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else
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return fpu_fxrstor_checking(fpu);
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return frstor_checking(&fpu->state->fsave);
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}
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static inline int restore_fpu_checking(struct task_struct *tsk)
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@ -42,9 +42,8 @@ extern int check_for_xstate(struct i387_fxsave_struct __user *buf,
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void __user *fpstate,
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struct _fpx_sw_bytes *sw);
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static inline int fpu_xrstor_checking(struct fpu *fpu)
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static inline int fpu_xrstor_checking(struct xsave_struct *fx)
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{
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struct xsave_struct *fx = &fpu->state->xsave;
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int err;
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asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
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@ -84,9 +83,6 @@ static inline int xsave_user(struct xsave_struct __user *buf)
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: [err] "=r" (err)
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: "D" (buf), "a" (-1), "d" (-1), "0" (0)
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: "memory");
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if (unlikely(err) && __clear_user(buf, xstate_size))
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err = -EFAULT;
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/* No need to clear here because the caller clears USED_MATH */
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return err;
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}
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@ -176,8 +176,10 @@ int save_i387_xstate(void __user *buf)
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else
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err = fxsave_user(buf);
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if (err)
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if (unlikely(err)) {
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__clear_user(buf, xstate_size);
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return err;
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}
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user_fpu_end();
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} else {
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sanitize_i387_state(tsk);
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