forked from Minki/linux
net/mlx5e: Fix page DMA map/unmap attributes
Driver initiates DMA sync, hence it may skip CPU sync. Add DMA_ATTR_SKIP_CPU_SYNC as input attribute both to dma_map_page and dma_unmap_page to avoid redundant sync with the CPU. When forcing the device to work with SWIOTLB, the extra sync might cause data corruption. The driver unmaps the whole page while the hardware used just a part of the bounce buffer. So syncing overrides the entire page with bounce buffer that only partially contains real data. Fixes:bc77b240b3
("net/mlx5e: Add fragmented memory support for RX multi packet WQE") Fixes:db05815b36
("net/mlx5e: Add XSK zero-copy support") Signed-off-by: Aya Levin <ayal@nvidia.com> Reviewed-by: Gal Pressman <gal@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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@ -11,13 +11,13 @@ static int mlx5e_xsk_map_pool(struct mlx5e_priv *priv,
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{
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struct device *dev = mlx5_core_dma_dev(priv->mdev);
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return xsk_pool_dma_map(pool, dev, 0);
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return xsk_pool_dma_map(pool, dev, DMA_ATTR_SKIP_CPU_SYNC);
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}
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static void mlx5e_xsk_unmap_pool(struct mlx5e_priv *priv,
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struct xsk_buff_pool *pool)
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{
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return xsk_pool_dma_unmap(pool, 0);
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return xsk_pool_dma_unmap(pool, DMA_ATTR_SKIP_CPU_SYNC);
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}
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static int mlx5e_xsk_get_pools(struct mlx5e_xsk *xsk)
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@ -278,8 +278,8 @@ static inline int mlx5e_page_alloc_pool(struct mlx5e_rq *rq,
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if (unlikely(!dma_info->page))
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return -ENOMEM;
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dma_info->addr = dma_map_page(rq->pdev, dma_info->page, 0,
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PAGE_SIZE, rq->buff.map_dir);
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dma_info->addr = dma_map_page_attrs(rq->pdev, dma_info->page, 0, PAGE_SIZE,
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rq->buff.map_dir, DMA_ATTR_SKIP_CPU_SYNC);
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if (unlikely(dma_mapping_error(rq->pdev, dma_info->addr))) {
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page_pool_recycle_direct(rq->page_pool, dma_info->page);
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dma_info->page = NULL;
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@ -300,7 +300,8 @@ static inline int mlx5e_page_alloc(struct mlx5e_rq *rq,
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void mlx5e_page_dma_unmap(struct mlx5e_rq *rq, struct mlx5e_dma_info *dma_info)
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{
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dma_unmap_page(rq->pdev, dma_info->addr, PAGE_SIZE, rq->buff.map_dir);
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dma_unmap_page_attrs(rq->pdev, dma_info->addr, PAGE_SIZE, rq->buff.map_dir,
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DMA_ATTR_SKIP_CPU_SYNC);
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}
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void mlx5e_page_release_dynamic(struct mlx5e_rq *rq,
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