forked from Minki/linux
drm/amdkfd: Fix sparse errors
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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parent
7113cd6529
commit
0b3674ae1c
drivers/gpu/drm/amd/amdkfd
@ -141,8 +141,6 @@ static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p,
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static int set_queue_properties_from_user(struct queue_properties *q_properties,
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struct kfd_ioctl_create_queue_args *args)
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{
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void *tmp;
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if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) {
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pr_err("kfd: queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
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return -EINVAL;
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@ -180,16 +178,18 @@ static int set_queue_properties_from_user(struct queue_properties *q_properties,
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return -EFAULT;
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}
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tmp = (void *)(uintptr_t)args->eop_buffer_address;
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if (tmp != NULL &&
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!access_ok(VERIFY_WRITE, tmp, sizeof(uint32_t))) {
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if (args->eop_buffer_address &&
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!access_ok(VERIFY_WRITE,
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(const void __user *) args->eop_buffer_address,
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sizeof(uint32_t))) {
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pr_debug("kfd: can't access eop buffer");
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return -EFAULT;
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}
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tmp = (void *)(uintptr_t)args->ctx_save_restore_address;
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if (tmp != NULL &&
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!access_ok(VERIFY_WRITE, tmp, sizeof(uint32_t))) {
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if (args->ctx_save_restore_address &&
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!access_ok(VERIFY_WRITE,
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(const void __user *) args->ctx_save_restore_address,
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sizeof(uint32_t))) {
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pr_debug("kfd: can't access ctx save restore buffer");
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return -EFAULT;
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}
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@ -62,12 +62,6 @@ enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
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return KFD_MQD_TYPE_CP;
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}
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inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
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{
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BUG_ON(!dqm || !dqm->dev);
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return dqm->dev->shared_resources.compute_pipe_count;
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}
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static inline unsigned int get_first_pipe(struct device_queue_manager *dqm)
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{
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BUG_ON(!dqm);
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@ -79,25 +73,6 @@ static inline unsigned int get_pipes_num_cpsch(void)
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return PIPE_PER_ME_CP_SCHEDULING;
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}
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inline unsigned int
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get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
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{
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uint32_t nybble;
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nybble = (pdd->lds_base >> 60) & 0x0E;
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return nybble;
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}
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inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
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{
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unsigned int shared_base;
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shared_base = (pdd->lds_base >> 16) & 0xFF;
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return shared_base;
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}
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void program_sh_mem_settings(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd)
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{
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@ -336,7 +311,8 @@ static int update_queue(struct device_queue_manager *dqm, struct queue *q)
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BUG_ON(!dqm || !q || !q->mqd);
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mutex_lock(&dqm->lock);
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mqd = dqm->ops.get_mqd_manager(dqm, q->properties.type);
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mqd = dqm->ops.get_mqd_manager(dqm,
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get_mqd_type_from_queue_type(q->properties.type));
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if (mqd == NULL) {
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mutex_unlock(&dqm->lock);
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return -ENOMEM;
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@ -160,10 +160,24 @@ void device_queue_manager_init_cik(struct device_queue_manager_ops *ops);
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void device_queue_manager_init_vi(struct device_queue_manager_ops *ops);
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void program_sh_mem_settings(struct device_queue_manager *dqm,
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struct qcm_process_device *qpd);
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inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *qpd);
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inline unsigned int get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd);
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int init_pipelines(struct device_queue_manager *dqm,
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unsigned int pipes_num, unsigned int first_pipe);
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inline unsigned int get_pipes_num(struct device_queue_manager *dqm);
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extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
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{
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return (pdd->lds_base >> 16) & 0xFF;
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}
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extern inline unsigned int
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get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
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{
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return (pdd->lds_base >> 60) & 0x0E;
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}
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extern inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
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{
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BUG_ON(!dqm || !dqm->dev);
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return dqm->dev->shared_resources.compute_pipe_count;
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}
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#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */
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