forked from Minki/linux
davinci: Integrate cp_intc support into low-level irq code
Integrate the Common Platform Interrupt Controller (cp_intc) support into the low-level irq handling for davinci and similar platforms. Do it such that support for cp_intc and the original aintc can coexist in the same kernel binary. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -1,5 +1,8 @@
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if ARCH_DAVINCI
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config AINTC
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bool
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config CP_INTC
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bool
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@ -9,12 +12,15 @@ comment "DaVinci Core Type"
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config ARCH_DAVINCI_DM644x
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bool "DaVinci 644x based system"
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select AINTC
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config ARCH_DAVINCI_DM355
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bool "DaVinci 355 based system"
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select AINTC
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config ARCH_DAVINCI_DM646x
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bool "DaVinci 646x based system"
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select AINTC
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comment "DaVinci Board Type"
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@ -4,17 +4,19 @@
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#
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# Common objects
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obj-y := time.o irq.o clock.o serial.o io.o psc.o \
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obj-y := time.o clock.o serial.o io.o psc.o \
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gpio.o devices.o dma.o usb.o common.o
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obj-$(CONFIG_DAVINCI_MUX) += mux.o
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obj-$(CONFIG_CP_INTC) += cp_intc.o
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# Chip specific
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obj-$(CONFIG_ARCH_DAVINCI_DM644x) += dm644x.o
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obj-$(CONFIG_ARCH_DAVINCI_DM355) += dm355.o
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obj-$(CONFIG_ARCH_DAVINCI_DM646x) += dm646x.o
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obj-$(CONFIG_AINTC) += irq.o
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obj-$(CONFIG_CP_INTC) += cp_intc.o
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# Board specific
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obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
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obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o
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@ -25,6 +25,7 @@ struct davinci_soc_info davinci_soc_info;
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EXPORT_SYMBOL(davinci_soc_info);
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void __iomem *davinci_intc_base;
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int davinci_intc_type;
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void davinci_get_mac_addr(struct memory_accessor *mem_acc, void *context)
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{
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@ -99,6 +100,7 @@ void __init davinci_common_init(struct davinci_soc_info *soc_info)
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}
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davinci_intc_base = davinci_soc_info.intc_base;
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davinci_intc_type = davinci_soc_info.intc_type;
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return;
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err:
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@ -18,6 +18,7 @@ extern struct sys_timer davinci_timer;
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extern void davinci_irq_init(void);
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extern void __iomem *davinci_intc_base;
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extern int davinci_intc_type;
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/* parameters describe VBUS sourcing for host mode */
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extern void setup_usb(unsigned mA, unsigned potpgt_msec);
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@ -23,9 +23,28 @@
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
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ldr \tmp, =davinci_intc_type
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ldr \tmp, [\tmp]
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cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
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beq 1001f
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#endif
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#if defined(CONFIG_AINTC)
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ldr \tmp, [\base, #0x14]
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movs \tmp, \tmp, lsr #2
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sub \irqnr, \tmp, #1
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b 1002f
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#endif
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#if defined(CONFIG_CP_INTC)
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1001: ldr \irqnr, [\base, #0x80] /* get irq number */
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and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
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mov \tmp, \irqnr, lsr #3
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and \tmp, \tmp, #0xfc
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add \tmp, \tmp, #0x280 /* get the register offset */
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ldr \irqstat, [\base, \tmp] /* get the intc status */
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cmp \irqstat, #0x0
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#endif
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1002:
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.endm
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.macro irq_prio_table
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