forked from Minki/linux
i40e/i40evf: add GetStatus command for nvmupdate
This adds a new GetStatus command so that the NVM update tool can query the current status instead of doing fake write requests to probe for readiness. Change-ID: I671ec6ccd4dfc9dbac3a03b964589d693fda5cd8 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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6b5c1b89c3
commit
0af8e9db2c
@ -638,6 +638,7 @@ static char *i40e_nvm_update_state_str[] = {
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"I40E_NVMUPD_CSUM_CON",
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"I40E_NVMUPD_CSUM_CON",
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"I40E_NVMUPD_CSUM_SA",
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"I40E_NVMUPD_CSUM_SA",
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"I40E_NVMUPD_CSUM_LCB",
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"I40E_NVMUPD_CSUM_LCB",
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"I40E_NVMUPD_STATUS",
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};
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};
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/**
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/**
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@ -654,10 +655,34 @@ i40e_status i40e_nvmupd_command(struct i40e_hw *hw,
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u8 *bytes, int *perrno)
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u8 *bytes, int *perrno)
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{
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{
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i40e_status status;
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i40e_status status;
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enum i40e_nvmupd_cmd upd_cmd;
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/* assume success */
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/* assume success */
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*perrno = 0;
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*perrno = 0;
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/* early check for status command and debug msgs */
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upd_cmd = i40e_nvmupd_validate_command(hw, cmd, perrno);
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i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d\n",
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i40e_nvm_update_state_str[upd_cmd],
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hw->nvmupd_state,
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hw->aq.nvm_release_on_done);
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if (upd_cmd == I40E_NVMUPD_INVALID) {
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*perrno = -EFAULT;
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i40e_debug(hw, I40E_DEBUG_NVM,
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"i40e_nvmupd_validate_command returns %d errno %d\n",
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upd_cmd, *perrno);
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}
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/* a status request returns immediately rather than
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* going into the state machine
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*/
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if (upd_cmd == I40E_NVMUPD_STATUS) {
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bytes[0] = hw->nvmupd_state;
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return 0;
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}
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switch (hw->nvmupd_state) {
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switch (hw->nvmupd_state) {
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case I40E_NVMUPD_STATE_INIT:
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case I40E_NVMUPD_STATE_INIT:
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status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);
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status = i40e_nvmupd_state_init(hw, cmd, bytes, perrno);
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@ -954,12 +979,13 @@ static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
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int *perrno)
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int *perrno)
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{
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{
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enum i40e_nvmupd_cmd upd_cmd;
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enum i40e_nvmupd_cmd upd_cmd;
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u8 transaction;
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u8 module, transaction;
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/* anything that doesn't match a recognized case is an error */
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/* anything that doesn't match a recognized case is an error */
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upd_cmd = I40E_NVMUPD_INVALID;
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upd_cmd = I40E_NVMUPD_INVALID;
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transaction = i40e_nvmupd_get_transaction(cmd->config);
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transaction = i40e_nvmupd_get_transaction(cmd->config);
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module = i40e_nvmupd_get_module(cmd->config);
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/* limits on data size */
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/* limits on data size */
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if ((cmd->data_size < 1) ||
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if ((cmd->data_size < 1) ||
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@ -986,6 +1012,10 @@ static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
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case I40E_NVM_SA:
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case I40E_NVM_SA:
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upd_cmd = I40E_NVMUPD_READ_SA;
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upd_cmd = I40E_NVMUPD_READ_SA;
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break;
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break;
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case I40E_NVM_EXEC:
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if (module == 0xf)
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upd_cmd = I40E_NVMUPD_STATUS;
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break;
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}
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}
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break;
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break;
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@ -1018,17 +1048,7 @@ static enum i40e_nvmupd_cmd i40e_nvmupd_validate_command(struct i40e_hw *hw,
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}
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}
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break;
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break;
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}
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}
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i40e_debug(hw, I40E_DEBUG_NVM, "%s state %d nvm_release_on_hold %d\n",
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i40e_nvm_update_state_str[upd_cmd],
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hw->nvmupd_state,
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hw->aq.nvm_release_on_done);
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if (upd_cmd == I40E_NVMUPD_INVALID) {
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*perrno = -EFAULT;
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i40e_debug(hw, I40E_DEBUG_NVM,
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"i40e_nvmupd_validate_command returns %d errno %d\n",
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upd_cmd, *perrno);
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}
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return upd_cmd;
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return upd_cmd;
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}
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}
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@ -305,6 +305,7 @@ enum i40e_nvmupd_cmd {
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I40E_NVMUPD_CSUM_CON,
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I40E_NVMUPD_CSUM_CON,
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I40E_NVMUPD_CSUM_SA,
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I40E_NVMUPD_CSUM_SA,
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I40E_NVMUPD_CSUM_LCB,
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I40E_NVMUPD_CSUM_LCB,
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I40E_NVMUPD_STATUS,
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};
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};
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enum i40e_nvmupd_state {
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enum i40e_nvmupd_state {
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@ -329,6 +330,7 @@ enum i40e_nvmupd_state {
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#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
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#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
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#define I40E_NVM_ERA 0x4
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#define I40E_NVM_ERA 0x4
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#define I40E_NVM_CSUM 0x8
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#define I40E_NVM_CSUM 0x8
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#define I40E_NVM_EXEC 0xf
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#define I40E_NVM_ADAPT_SHIFT 16
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#define I40E_NVM_ADAPT_SHIFT 16
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#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
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#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
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@ -304,6 +304,7 @@ enum i40e_nvmupd_cmd {
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I40E_NVMUPD_CSUM_CON,
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I40E_NVMUPD_CSUM_CON,
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I40E_NVMUPD_CSUM_SA,
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I40E_NVMUPD_CSUM_SA,
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I40E_NVMUPD_CSUM_LCB,
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I40E_NVMUPD_CSUM_LCB,
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I40E_NVMUPD_STATUS,
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};
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};
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enum i40e_nvmupd_state {
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enum i40e_nvmupd_state {
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@ -328,6 +329,7 @@ enum i40e_nvmupd_state {
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#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
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#define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB)
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#define I40E_NVM_ERA 0x4
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#define I40E_NVM_ERA 0x4
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#define I40E_NVM_CSUM 0x8
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#define I40E_NVM_CSUM 0x8
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#define I40E_NVM_EXEC 0xf
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#define I40E_NVM_ADAPT_SHIFT 16
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#define I40E_NVM_ADAPT_SHIFT 16
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#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
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#define I40E_NVM_ADAPT_MASK (0xffff << I40E_NVM_ADAPT_SHIFT)
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