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drm/nouveau/therm: switch to instanced constructor

Browse Source 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs 2020-12-04 12:49:36 +10:00
parent e4b15b4ca0
commit 0aec69c76e
16 changed files with 106 additions and 111 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
View File

@ -60,7 +60,6 @@ struct nvkm_device {
struct notifier_block nb;
} acpi;
struct nvkm_therm *therm;
struct nvkm_timer *timer;
struct nvkm_top *top;
struct nvkm_volt *volt;
@ -127,7 +126,6 @@ struct nvkm_device_chip {
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
int (*therm )(struct nvkm_device *, int idx, struct nvkm_therm **);
int (*timer )(struct nvkm_device *, int idx, struct nvkm_timer **);
int (*top )(struct nvkm_device *, int idx, struct nvkm_top **);
int (*volt )(struct nvkm_device *, int idx, struct nvkm_volt **);

1
drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
View File

@ -18,5 +18,6 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_FAULT , struct nvkm_fault , fault)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_ACR , struct nvkm_acr , acr)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_PMU , struct nvkm_pmu , pmu)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_ICCSENSE, struct nvkm_iccsense, iccsense)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_THERM , struct nvkm_therm , therm)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_CLK , struct nvkm_clk , clk)
NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GSP , struct nvkm_gsp , gsp)

18
drivers/gpu/drm/nouveau/include/nvkm/subdev/therm.h
View File

@ -107,13 +107,13 @@ void nvkm_therm_clkgate_init(struct nvkm_therm *,
void nvkm_therm_clkgate_enable(struct nvkm_therm *);
void nvkm_therm_clkgate_fini(struct nvkm_therm *, bool);
int nv40_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int nv50_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int g84_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int gt215_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int gf119_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int gk104_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int gm107_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int gm200_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int gp100_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
int nv40_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int nv50_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int g84_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int gt215_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int gf119_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int gk104_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int gm107_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int gm200_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
int gp100_therm_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_therm **);
#endif

1
drivers/gpu/drm/nouveau/nvkm/core/subdev.c
View File

@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
#include <core/layout.h>
#undef NVKM_LAYOUT_ONCE
#undef NVKM_LAYOUT_INST
[NVKM_SUBDEV_THERM ] = "therm",
[NVKM_SUBDEV_TIMER ] = "tmr",
[NVKM_SUBDEV_TOP ] = "top",
[NVKM_SUBDEV_VOLT ] = "volt",

127
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
View File

@ -483,7 +483,7 @@ nv40_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv04_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv40_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -509,7 +509,7 @@ nv41_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv41_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -535,7 +535,7 @@ nv42_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv41_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -561,7 +561,7 @@ nv43_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv41_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -587,7 +587,7 @@ nv44_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -613,7 +613,7 @@ nv45_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv04_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -639,7 +639,7 @@ nv46_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv46_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -665,7 +665,7 @@ nv47_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv41_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -691,7 +691,7 @@ nv49_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv41_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -717,7 +717,7 @@ nv4a_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv04_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -743,7 +743,7 @@ nv4b_chipset = {
.mc = { 0x00000001, nv17_mc_new },
.mmu = { 0x00000001, nv41_mmu_new },
.pci = { 0x00000001, nv40_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -769,7 +769,7 @@ nv4c_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv4c_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -795,7 +795,7 @@ nv4e_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv4c_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -824,7 +824,7 @@ nv50_chipset = {
.mmu = { 0x00000001, nv50_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, nv46_pci_new },
.therm = nv50_therm_new,
.therm = { 0x00000001, nv50_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv50_disp_new,
@ -850,7 +850,7 @@ nv63_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv4c_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -876,7 +876,7 @@ nv67_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv4c_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -902,7 +902,7 @@ nv68_chipset = {
.mc = { 0x00000001, nv44_mc_new },
.mmu = { 0x00000001, nv44_mmu_new },
.pci = { 0x00000001, nv4c_pci_new },
.therm = nv40_therm_new,
.therm = { 0x00000001, nv40_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = nv04_disp_new,
@ -931,7 +931,7 @@ nv84_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g84_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.bsp = g84_bsp_new,
@ -963,7 +963,7 @@ nv86_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g84_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.bsp = g84_bsp_new,
@ -995,7 +995,7 @@ nv92_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g92_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.bsp = g84_bsp_new,
@ -1027,7 +1027,7 @@ nv94_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.bsp = g84_bsp_new,
@ -1059,7 +1059,7 @@ nv96_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.bsp = g84_bsp_new,
@ -1091,7 +1091,7 @@ nv98_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = g94_disp_new,
@ -1123,7 +1123,7 @@ nva0_chipset = {
.mmu = { 0x00000001, g84_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.bsp = g84_bsp_new,
@ -1156,7 +1156,7 @@ nva3_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.ce[0] = gt215_ce_new,
@ -1190,7 +1190,7 @@ nva5_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.ce[0] = gt215_ce_new,
@ -1223,7 +1223,7 @@ nva8_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.ce[0] = gt215_ce_new,
@ -1255,7 +1255,7 @@ nvaa_chipset = {
.mmu = { 0x00000001, mcp77_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = mcp77_disp_new,
@ -1287,7 +1287,7 @@ nvac_chipset = {
.mmu = { 0x00000001, mcp77_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.therm = g84_therm_new,
.therm = { 0x00000001, g84_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.disp = mcp77_disp_new,
@ -1320,7 +1320,7 @@ nvaf_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, g94_pci_new },
.pmu = { 0x00000001, gt215_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = nv40_volt_new,
.ce[0] = gt215_ce_new,
@ -1356,7 +1356,7 @@ nvc0_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1393,7 +1393,7 @@ nvc1_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1429,7 +1429,7 @@ nvc3_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1465,7 +1465,7 @@ nvc4_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1502,7 +1502,7 @@ nvc8_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1539,7 +1539,7 @@ nvce_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf100_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1576,7 +1576,7 @@ nvcf_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = { 0x00000001, gf100_pmu_new },
.therm = gt215_therm_new,
.therm = { 0x00000001, gt215_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1611,7 +1611,7 @@ nvd7_chipset = {
.mmu = { 0x00000001, gf100_mmu_new },
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.therm = gf119_therm_new,
.therm = { 0x00000001, gf119_therm_new },
.timer = nv41_timer_new,
.volt = gf117_volt_new,
.ce[0] = gf100_ce_new,
@ -1647,7 +1647,7 @@ nvd9_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gf106_pci_new },
.pmu = { 0x00000001, gf119_pmu_new },
.therm = gf119_therm_new,
.therm = { 0x00000001, gf119_therm_new },
.timer = nv41_timer_new,
.volt = gf100_volt_new,
.ce[0] = gf100_ce_new,
@ -1683,7 +1683,7 @@ nve4_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk104_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1722,7 +1722,7 @@ nve6_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk104_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1761,7 +1761,7 @@ nve7_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk104_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1825,7 +1825,7 @@ nvf0_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk110_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1863,7 +1863,7 @@ nvf1_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk110_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1901,7 +1901,7 @@ nv106_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk208_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1939,7 +1939,7 @@ nv108_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gk208_pmu_new },
.therm = gk104_therm_new,
.therm = { 0x00000001, gk104_therm_new },
.timer = nv41_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -1977,7 +1977,7 @@ nv117_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gm107_pmu_new },
.therm = gm107_therm_new,
.therm = { 0x00000001, gm107_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -2013,7 +2013,7 @@ nv118_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gm107_pmu_new },
.therm = gm107_therm_new,
.therm = { 0x00000001, gm107_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -2047,7 +2047,7 @@ nv120_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gm200_pmu_new },
.therm = gm200_therm_new,
.therm = { 0x00000001, gm200_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -2085,7 +2085,7 @@ nv124_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gm200_pmu_new },
.therm = gm200_therm_new,
.therm = { 0x00000001, gm200_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -2123,7 +2123,7 @@ nv126_chipset = {
.mxm = { 0x00000001, nv50_mxm_new },
.pci = { 0x00000001, gk104_pci_new },
.pmu = { 0x00000001, gm200_pmu_new },
.therm = gm200_therm_new,
.therm = { 0x00000001, gm200_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.volt = gk104_volt_new,
@ -2182,7 +2182,7 @@ nv130_chipset = {
.ltc = { 0x00000001, gp100_ltc_new },
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gm200_pmu_new },
.timer = gk20a_timer_new,
@ -2222,7 +2222,7 @@ nv132_chipset = {
.ltc = { 0x00000001, gp102_ltc_new },
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
@ -2260,7 +2260,7 @@ nv134_chipset = {
.ltc = { 0x00000001, gp102_ltc_new },
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
@ -2298,7 +2298,7 @@ nv136_chipset = {
.ltc = { 0x00000001, gp102_ltc_new },
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
@ -2335,7 +2335,7 @@ nv137_chipset = {
.ltc = { 0x00000001, gp102_ltc_new },
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
@ -2373,7 +2373,7 @@ nv138_chipset = {
.ltc = { 0x00000001, gp102_ltc_new },
.mc = { 0x00000001, gp100_mc_new },
.mmu = { 0x00000001, gp100_mmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.timer = gk20a_timer_new,
@ -2436,7 +2436,7 @@ nv140_chipset = {
.mmu = { 0x00000001, gv100_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.disp = gv100_disp_new,
@ -2480,7 +2480,7 @@ nv162_chipset = {
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = tu102_ce_new,
@ -2518,7 +2518,7 @@ nv164_chipset = {
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = tu102_ce_new,
@ -2557,7 +2557,7 @@ nv166_chipset = {
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = tu102_ce_new,
@ -2597,7 +2597,7 @@ nv167_chipset = {
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = tu102_ce_new,
@ -2635,7 +2635,7 @@ nv168_chipset = {
.mmu = { 0x00000001, tu102_mmu_new },
.pci = { 0x00000001, gp100_pci_new },
.pmu = { 0x00000001, gp102_pmu_new },
.therm = gp100_therm_new,
.therm = { 0x00000001, gp100_therm_new },
.timer = gk20a_timer_new,
.top = gk104_top_new,
.ce[0] = tu102_ce_new,
@ -3248,7 +3248,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
_(NVKM_SUBDEV_THERM , therm);
_(NVKM_SUBDEV_TIMER , timer);
_(NVKM_SUBDEV_TOP , top);
_(NVKM_SUBDEV_VOLT , volt);

10
drivers/gpu/drm/nouveau/nvkm/subdev/therm/base.c
View File

@ -421,10 +421,10 @@ nvkm_therm = {
};
void
nvkm_therm_ctor(struct nvkm_therm *therm, struct nvkm_device *device,
int index, const struct nvkm_therm_func *func)
nvkm_therm_ctor(struct nvkm_therm *therm, struct nvkm_device *device, enum nvkm_subdev_type type,
int inst, const struct nvkm_therm_func *func)
{
nvkm_subdev_ctor(&nvkm_therm, device, index, &therm->subdev);
nvkm_subdev_ctor(&nvkm_therm, device, type, inst, &therm->subdev);
therm->func = func;
nvkm_alarm_init(&therm->alarm, nvkm_therm_alarm);
@ -443,13 +443,13 @@ nvkm_therm_ctor(struct nvkm_therm *therm, struct nvkm_device *device,
int
nvkm_therm_new_(const struct nvkm_therm_func *func, struct nvkm_device *device,
int index, struct nvkm_therm **ptherm)
enum nvkm_subdev_type type, int inst, struct nvkm_therm **ptherm)
{
struct nvkm_therm *therm;
if (!(therm = *ptherm = kzalloc(sizeof(*therm), GFP_KERNEL)))
return -ENOMEM;
nvkm_therm_ctor(therm, device, index, func);
nvkm_therm_ctor(therm, device, type, inst, func);
return 0;
}

5
drivers/gpu/drm/nouveau/nvkm/subdev/therm/g84.c
View File

@ -223,12 +223,13 @@ g84_therm = {
};
int
g84_therm_new(struct nvkm_device *device, int index, struct nvkm_therm **ptherm)
g84_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
struct nvkm_therm *therm;
int ret;
ret = nvkm_therm_new_(&g84_therm, device, index, &therm);
ret = nvkm_therm_new_(&g84_therm, device, type, inst, &therm);
*ptherm = therm;
if (ret)
return ret;

6
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gf119.c
View File

@ -146,8 +146,8 @@ gf119_therm = {
};
int
gf119_therm_new(struct nvkm_device *device, int index,
struct nvkm_therm **ptherm)
gf119_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&gf119_therm, device, index, ptherm);
return nvkm_therm_new_(&gf119_therm, device, type, inst, ptherm);
}

13
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gk104.c
View File

@ -106,9 +106,8 @@ gk104_therm_func = {
};
static int
gk104_therm_new_(const struct nvkm_therm_func *func,
struct nvkm_device *device,
int index,
gk104_therm_new_(const struct nvkm_therm_func *func, struct nvkm_device *device,
enum nvkm_subdev_type type, int inst,
const struct gk104_clkgate_engine_info *clkgate_order,
const struct gf100_idle_filter *idle_filter,
struct nvkm_therm **ptherm)
@ -118,19 +117,17 @@ gk104_therm_new_(const struct nvkm_therm_func *func,
if (!therm)
return -ENOMEM;
nvkm_therm_ctor(&therm->base, device, index, func);
nvkm_therm_ctor(&therm->base, device, type, inst, func);
*ptherm = &therm->base;
therm->clkgate_order = clkgate_order;
therm->idle_filter = idle_filter;
return 0;
}
int
gk104_therm_new(struct nvkm_device *device,
int index, struct nvkm_therm **ptherm)
gk104_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_therm **ptherm)
{
return gk104_therm_new_(&gk104_therm_func, device, index,
return gk104_therm_new_(&gk104_therm_func, device, type, inst,
gk104_clkgate_engine_info, &gk104_idle_filter,
ptherm);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm107.c
View File

@ -68,8 +68,8 @@ gm107_therm = {
};
int
gm107_therm_new(struct nvkm_device *device, int index,
gm107_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&gm107_therm, device, index, ptherm);
return nvkm_therm_new_(&gm107_therm, device, type, inst, ptherm);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gm200.c
View File

@ -32,8 +32,8 @@ gm200_therm = {
};
int
gm200_therm_new(struct nvkm_device *device, int index,
gm200_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&gm200_therm, device, index, ptherm);
return nvkm_therm_new_(&gm200_therm, device, type, inst, ptherm);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gp100.c
View File

@ -49,8 +49,8 @@ gp100_therm = {
};
int
gp100_therm_new(struct nvkm_device *device, int index,
gp100_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&gp100_therm, device, index, ptherm);
return nvkm_therm_new_(&gp100_therm, device, type, inst, ptherm);
}

6
drivers/gpu/drm/nouveau/nvkm/subdev/therm/gt215.c
View File

@ -68,8 +68,8 @@ gt215_therm = {
};
int
gt215_therm_new(struct nvkm_device *device, int index,
struct nvkm_therm **ptherm)
gt215_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&gt215_therm, device, index, ptherm);
return nvkm_therm_new_(&gt215_therm, device, type, inst, ptherm);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv40.c
View File

@ -197,8 +197,8 @@ nv40_therm = {
};
int
nv40_therm_new(struct nvkm_device *device, int index,
nv40_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&nv40_therm, device, index, ptherm);
return nvkm_therm_new_(&nv40_therm, device, type, inst, ptherm);
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/therm/nv50.c
View File

@ -169,8 +169,8 @@ nv50_therm = {
};
int
nv50_therm_new(struct nvkm_device *device, int index,
nv50_therm_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_therm **ptherm)
{
return nvkm_therm_new_(&nv50_therm, device, index, ptherm);
return nvkm_therm_new_(&nv50_therm, device, type, inst, ptherm);
}

8
drivers/gpu/drm/nouveau/nvkm/subdev/therm/priv.h
View File

@ -30,10 +30,10 @@
#include <subdev/bios/gpio.h>
#include <subdev/bios/perf.h>
int nvkm_therm_new_(const struct nvkm_therm_func *, struct nvkm_device *,
int index, struct nvkm_therm **);
void nvkm_therm_ctor(struct nvkm_therm *therm, struct nvkm_device *device,
int index, const struct nvkm_therm_func *func);
int nvkm_therm_new_(const struct nvkm_therm_func *, struct nvkm_device *, enum nvkm_subdev_type,
int, struct nvkm_therm **);
void nvkm_therm_ctor(struct nvkm_therm *, struct nvkm_device *, enum nvkm_subdev_type, int,
const struct nvkm_therm_func *);
struct nvkm_fan {
struct nvkm_therm *parent;