clk: sunxi-ng: sun5i: Export video PLLs
The video PLLs are used directly by the HDMI controller. Export them so that we can use them in our DT node. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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@@ -28,15 +28,17 @@
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#define CLK_PLL_AUDIO_4X 6
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#define CLK_PLL_AUDIO_4X 6
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#define CLK_PLL_AUDIO_8X 7
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#define CLK_PLL_AUDIO_8X 7
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#define CLK_PLL_VIDEO0 8
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#define CLK_PLL_VIDEO0 8
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#define CLK_PLL_VIDEO0_2X 9
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/* The PLL_VIDEO0_2X is exported for HDMI */
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#define CLK_PLL_VE 10
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#define CLK_PLL_VE 10
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#define CLK_PLL_DDR_BASE 11
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#define CLK_PLL_DDR_BASE 11
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#define CLK_PLL_DDR 12
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#define CLK_PLL_DDR 12
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#define CLK_PLL_DDR_OTHER 13
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#define CLK_PLL_DDR_OTHER 13
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#define CLK_PLL_PERIPH 14
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#define CLK_PLL_PERIPH 14
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#define CLK_PLL_VIDEO1 15
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#define CLK_PLL_VIDEO1 15
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#define CLK_PLL_VIDEO1_2X 16
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/* The PLL_VIDEO1_2X is exported for HDMI */
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/* The CPU clock is exported */
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/* The CPU clock is exported */
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#define CLK_AXI 18
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#define CLK_AXI 18
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@@ -19,6 +19,9 @@
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#define CLK_HOSC 1
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#define CLK_HOSC 1
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#define CLK_PLL_VIDEO0_2X 9
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#define CLK_PLL_VIDEO1_2X 16
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#define CLK_CPU 17
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#define CLK_CPU 17
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#define CLK_AHB_OTG 23
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#define CLK_AHB_OTG 23
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