forked from Minki/linux
sh: Optimized flush_icache_range() implementation.
Add implementation of flush_icache_range() suitable for signal handler and kprobes. Remove flush_cache_sigtramp() and change signal.c to use flush_icache_range(). Signed-off-by: Chris Smith <chris.smith@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -398,10 +398,7 @@ static int setup_frame(int sig, struct k_sigaction *ka,
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pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
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current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
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flush_cache_sigtramp(regs->pr);
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if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
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flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
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flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode));
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return 0;
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@ -486,10 +483,7 @@ static int setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info,
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pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n",
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current->comm, task_pid_nr(current), frame, regs->pc, regs->pr);
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flush_cache_sigtramp(regs->pr);
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if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode))
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flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES);
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flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode));
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return 0;
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@ -4,6 +4,7 @@
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* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
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* Copyright (C) 2001 - 2007 Paul Mundt
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* Copyright (C) 2003 Richard Curnow
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* Copyright (c) 2007 STMicroelectronics (R&D) Ltd.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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@ -22,6 +23,7 @@
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* entirety.
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*/
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#define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */
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#define MAX_ICACHE_PAGES 32
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static void __flush_dcache_segment_1way(unsigned long start,
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unsigned long extent);
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@ -178,42 +180,45 @@ void __flush_invalidate_region(void *start, int size)
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/*
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* Write back the range of D-cache, and purge the I-cache.
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*
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* Called from kernel/module.c:sys_init_module and routine for a.out format.
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* Called from kernel/module.c:sys_init_module and routine for a.out format,
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* signal handler code and kprobes code
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*/
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void flush_icache_range(unsigned long start, unsigned long end)
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{
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flush_cache_all();
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}
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/*
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* Write back the D-cache and purge the I-cache for signal trampoline.
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* .. which happens to be the same behavior as flush_icache_range().
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* So, we simply flush out a line.
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*/
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void __uses_jump_to_uncached flush_cache_sigtramp(unsigned long addr)
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{
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unsigned long v, index;
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unsigned long flags;
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int icacheaddr;
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unsigned long flags, v;
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int i;
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v = addr & ~(L1_CACHE_BYTES-1);
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asm volatile("ocbwb %0"
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: /* no output */
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: "m" (__m(v)));
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index = CACHE_IC_ADDRESS_ARRAY |
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(v & boot_cpu_data.icache.entry_mask);
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/* If there are too many pages then just blow the caches */
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if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) {
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flush_cache_all();
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} else {
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/* selectively flush d-cache then invalidate the i-cache */
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/* this is inefficient, so only use for small ranges */
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start &= ~(L1_CACHE_BYTES-1);
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end += L1_CACHE_BYTES-1;
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end &= ~(L1_CACHE_BYTES-1);
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local_irq_save(flags);
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jump_to_uncached();
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for (i = 0; i < boot_cpu_data.icache.ways;
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i++, index += boot_cpu_data.icache.way_incr)
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ctrl_outl(0, index); /* Clear out Valid-bit */
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for (v = start; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbwb %0"
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: /* no output */
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: "m" (__m(v)));
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icacheaddr = CACHE_IC_ADDRESS_ARRAY | (
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v & cpu_data->icache.entry_mask);
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for (i = 0; i < cpu_data->icache.ways;
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i++, icacheaddr += cpu_data->icache.way_incr)
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/* Clear i-cache line valid-bit */
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ctrl_outl(0, icacheaddr);
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}
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back_to_cached();
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wmb();
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local_irq_restore(flags);
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}
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}
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static inline void flush_cache_4096(unsigned long start,
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@ -30,7 +30,6 @@ void flush_dcache_page(struct page *pg);
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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void flush_icache_range(unsigned long start, unsigned long end);
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void flush_cache_sigtramp(unsigned long addr);
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void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
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unsigned long addr, int len);
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