forked from Minki/linux
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: disable mwait for AMD family 10H/11H CPUs x86: fix crash on cpu hotplug on pat-incapable machines x86: remove mwait capability C-state check
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commit
08c18964a2
@ -99,15 +99,6 @@ static void mwait_idle(void)
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local_irq_enable();
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}
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static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
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{
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if (force_mwait)
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return 1;
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/* Any C1 states supported? */
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return c->cpuid_level >= 5 && ((cpuid_edx(5) >> 4) & 0xf) > 0;
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}
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/*
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* On SMP it's slightly faster (but much more power-consuming!)
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* to poll the ->work.need_resched flag instead of waiting for the
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@ -119,6 +110,33 @@ static void poll_idle(void)
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cpu_relax();
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}
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/*
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* mwait selection logic:
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*
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* It depends on the CPU. For AMD CPUs that support MWAIT this is
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* wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
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* then depend on a clock divisor and current Pstate of the core. If
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* all cores of a processor are in halt state (C1) the processor can
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* enter the C1E (C1 enhanced) state. If mwait is used this will never
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* happen.
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*
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* idle=mwait overrides this decision and forces the usage of mwait.
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*/
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static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c)
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{
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if (force_mwait)
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return 1;
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if (c->x86_vendor == X86_VENDOR_AMD) {
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switch(c->x86) {
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case 0x10:
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case 0x11:
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return 0;
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}
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}
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return 1;
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}
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void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
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{
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static int selected;
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@ -28,7 +28,7 @@
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#ifdef CONFIG_X86_PAT
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int __read_mostly pat_wc_enabled = 1;
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void __init pat_disable(char *reason)
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void __cpuinit pat_disable(char *reason)
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{
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pat_wc_enabled = 0;
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printk(KERN_INFO "%s\n", reason);
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