drm/amd/display: fix dml20 min_dst_y_next_start calculation
Bring this calculation in line with HW programming guide. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -929,8 +929,7 @@ static void dml20_rq_dlg_get_dlg_params(struct display_mode_lib *mode_lib,
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min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal;
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dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start;
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disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start
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+ min_dst_y_ttu_vblank) * dml_pow(2, 2));
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disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2));
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ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18));
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dml_print("DML_DLG: %s: min_dcfclk_mhz = %3.2f\n",
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