forked from Minki/linux
powerpc fixes for 4.13 #4
The highlight is Ben's patch to work around a host killing bug when running KVM
guests with the Radix MMU on Power9. See the long change log of that commit for
more detail.
And then three fairly minor fixes:
- Fix of_node_put() underflow during reconfig remove, using old DLPAR tools.
- Fix recently introduced ld version check with 64-bit LE-only toolchain.
- Free the subpage_prot_table correctly, avoiding a memory leak.
Thanks to:
Aneesh Kumar K.V, Benjamin Herrenschmidt, Laurent Vivier.
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Merge tag 'powerpc-4.13-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
"The highlight is Ben's patch to work around a host killing bug when
running KVM guests with the Radix MMU on Power9. See the long change
log of that commit for more detail.
And then three fairly minor fixes:
- fix of_node_put() underflow during reconfig remove, using old DLPAR
tools.
- fix recently introduced ld version check with 64-bit LE-only
toolchain.
- free the subpage_prot_table correctly, avoiding a memory leak.
Thanks to: Aneesh Kumar K.V, Benjamin Herrenschmidt, Laurent Vivier"
* tag 'powerpc-4.13-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm/hash: Free the subpage_prot_table correctly
powerpc/Makefile: Fix ld version check with 64-bit LE-only toolchain
powerpc/pseries: Fix of_node_put() underflow during reconfig remove
powerpc/mm/radix: Workaround prefetch issue with KVM
This commit is contained in:
Linus Torvalds
commit
080012bad6
@ -59,6 +59,19 @@ machine-$(CONFIG_PPC64) += 64
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machine-$(CONFIG_CPU_LITTLE_ENDIAN) += le
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UTS_MACHINE := $(subst $(space),,$(machine-y))
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# XXX This needs to be before we override LD below
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ifdef CONFIG_PPC32
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KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
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else
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ifeq ($(call ld-ifversion, -ge, 225000000, y),y)
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# Have the linker provide sfpr if possible.
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# There is a corresponding test in arch/powerpc/lib/Makefile
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KBUILD_LDFLAGS_MODULE += --save-restore-funcs
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else
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KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
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endif
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endif
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ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
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override LD += -EL
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LDEMULATION := lppc
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@ -190,18 +203,6 @@ else
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CHECKFLAGS += -D__LITTLE_ENDIAN__
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endif
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ifdef CONFIG_PPC32
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KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
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else
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ifeq ($(call ld-ifversion, -ge, 225000000, y),y)
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# Have the linker provide sfpr if possible.
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# There is a corresponding test in arch/powerpc/lib/Makefile
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KBUILD_LDFLAGS_MODULE += --save-restore-funcs
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else
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KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o
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endif
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endif
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ifeq ($(CONFIG_476FPE_ERR46),y)
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KBUILD_LDFLAGS_MODULE += --ppc476-workaround \
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-T $(srctree)/arch/powerpc/platforms/44x/ppc476_modules.lds
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@ -59,13 +59,14 @@ extern struct patb_entry *partition_tb;
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#define PRTS_MASK 0x1f /* process table size field */
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#define PRTB_MASK 0x0ffffffffffff000UL
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/*
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* Limit process table to PAGE_SIZE table. This
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* also limit the max pid we can support.
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* MAX_USER_CONTEXT * 16 bytes of space.
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*/
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#define PRTB_SIZE_SHIFT (CONTEXT_BITS + 4)
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#define PRTB_ENTRIES (1ul << CONTEXT_BITS)
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/* Number of supported PID bits */
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extern unsigned int mmu_pid_bits;
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/* Base PID to allocate from */
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extern unsigned int mmu_base_pid;
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#define PRTB_SIZE_SHIFT (mmu_pid_bits + 4)
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#define PRTB_ENTRIES (1ul << mmu_pid_bits)
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/*
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* Power9 currently only support 64K partition table size.
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@ -67,6 +67,12 @@ extern void __destroy_context(unsigned long context_id);
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extern void mmu_context_init(void);
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#endif
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#if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) && defined(CONFIG_PPC_RADIX_MMU)
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extern void radix_kvm_prefetch_workaround(struct mm_struct *mm);
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#else
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static inline void radix_kvm_prefetch_workaround(struct mm_struct *mm) { }
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#endif
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extern void switch_cop(struct mm_struct *next);
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extern int use_cop(unsigned long acop, struct mm_struct *mm);
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extern void drop_cop(unsigned long acop, struct mm_struct *mm);
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@ -79,9 +85,13 @@ static inline void switch_mm_irqs_off(struct mm_struct *prev,
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struct mm_struct *next,
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struct task_struct *tsk)
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{
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bool new_on_cpu = false;
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/* Mark this context has been used on the new CPU */
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if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next)))
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if (!cpumask_test_cpu(smp_processor_id(), mm_cpumask(next))) {
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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new_on_cpu = true;
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}
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/* 32-bit keeps track of the current PGDIR in the thread struct */
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#ifdef CONFIG_PPC32
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@ -109,6 +119,10 @@ static inline void switch_mm_irqs_off(struct mm_struct *prev,
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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asm volatile ("dssall");
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#endif /* CONFIG_ALTIVEC */
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if (new_on_cpu)
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radix_kvm_prefetch_workaround(next);
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/*
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* The actual HW switching method differs between the various
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* sub architectures. Out of line for now
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@ -1443,12 +1443,14 @@ mc_cont:
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ori r6,r6,1
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mtspr SPRN_CTRLT,r6
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4:
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/* Read the guest SLB and save it away */
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/* Check if we are running hash or radix and store it in cr2 */
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ld r5, VCPU_KVM(r9)
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lbz r0, KVM_RADIX(r5)
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cmpwi r0, 0
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cmpwi cr2,r0,0
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/* Read the guest SLB and save it away */
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li r5, 0
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bne 3f /* for radix, save 0 entries */
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bne cr2, 3f /* for radix, save 0 entries */
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lwz r0,VCPU_SLB_NR(r9) /* number of entries in SLB */
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mtctr r0
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li r6,0
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@ -1712,11 +1714,6 @@ BEGIN_FTR_SECTION_NESTED(96)
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END_FTR_SECTION_NESTED(CPU_FTR_ARCH_300, 0, 96)
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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22:
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/* Clear out SLB */
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li r5,0
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slbmte r5,r5
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slbia
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ptesync
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/* Restore host values of some registers */
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BEGIN_FTR_SECTION
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@ -1737,10 +1734,56 @@ BEGIN_FTR_SECTION
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mtspr SPRN_PID, r7
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mtspr SPRN_IAMR, r8
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END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
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#ifdef CONFIG_PPC_RADIX_MMU
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/*
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* Are we running hash or radix ?
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*/
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beq cr2,3f
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/* Radix: Handle the case where the guest used an illegal PID */
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LOAD_REG_ADDR(r4, mmu_base_pid)
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lwz r3, VCPU_GUEST_PID(r9)
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lwz r5, 0(r4)
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cmpw cr0,r3,r5
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blt 2f
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/*
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* Illegal PID, the HW might have prefetched and cached in the TLB
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* some translations for the LPID 0 / guest PID combination which
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* Linux doesn't know about, so we need to flush that PID out of
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* the TLB. First we need to set LPIDR to 0 so tlbiel applies to
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* the right context.
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*/
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li r0,0
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mtspr SPRN_LPID,r0
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isync
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/* Then do a congruence class local flush */
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ld r6,VCPU_KVM(r9)
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lwz r0,KVM_TLB_SETS(r6)
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mtctr r0
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li r7,0x400 /* IS field = 0b01 */
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ptesync
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sldi r0,r3,32 /* RS has PID */
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1: PPC_TLBIEL(7,0,2,1,1) /* RIC=2, PRS=1, R=1 */
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addi r7,r7,0x1000
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bdnz 1b
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ptesync
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2: /* Flush the ERAT on radix P9 DD1 guest exit */
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BEGIN_FTR_SECTION
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PPC_INVALIDATE_ERAT
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END_FTR_SECTION_IFSET(CPU_FTR_POWER9_DD1)
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b 4f
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#endif /* CONFIG_PPC_RADIX_MMU */
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/* Hash: clear out SLB */
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3: li r5,0
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slbmte r5,r5
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slbia
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ptesync
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4:
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/*
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* POWER7/POWER8 guest -> host partition switch code.
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* We don't have to lock against tlbies but we do
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@ -126,9 +126,10 @@ static int hash__init_new_context(struct mm_struct *mm)
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static int radix__init_new_context(struct mm_struct *mm)
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{
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unsigned long rts_field;
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int index;
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int index, max_id;
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index = alloc_context_id(1, PRTB_ENTRIES - 1);
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max_id = (1 << mmu_pid_bits) - 1;
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index = alloc_context_id(mmu_base_pid, max_id);
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if (index < 0)
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return index;
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@ -25,6 +25,9 @@
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#include <trace/events/thp.h>
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unsigned int mmu_pid_bits;
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unsigned int mmu_base_pid;
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static int native_register_process_table(unsigned long base, unsigned long pg_sz,
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unsigned long table_size)
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{
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@ -261,11 +264,34 @@ static void __init radix_init_pgtable(void)
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for_each_memblock(memory, reg)
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WARN_ON(create_physical_mapping(reg->base,
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reg->base + reg->size));
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/* Find out how many PID bits are supported */
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if (cpu_has_feature(CPU_FTR_HVMODE)) {
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if (!mmu_pid_bits)
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mmu_pid_bits = 20;
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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/*
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* When KVM is possible, we only use the top half of the
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* PID space to avoid collisions between host and guest PIDs
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* which can cause problems due to prefetch when exiting the
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* guest with AIL=3
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*/
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mmu_base_pid = 1 << (mmu_pid_bits - 1);
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#else
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mmu_base_pid = 1;
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#endif
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} else {
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/* The guest uses the bottom half of the PID space */
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if (!mmu_pid_bits)
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mmu_pid_bits = 19;
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mmu_base_pid = 1;
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}
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/*
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* Allocate Partition table and process table for the
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* host.
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*/
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BUILD_BUG_ON_MSG((PRTB_SIZE_SHIFT > 36), "Process table size too large.");
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BUG_ON(PRTB_SIZE_SHIFT > 36);
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process_tb = early_alloc_pgtable(1UL << PRTB_SIZE_SHIFT);
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/*
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* Fill in the process table.
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@ -339,6 +365,12 @@ static int __init radix_dt_scan_page_sizes(unsigned long node,
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if (type == NULL || strcmp(type, "cpu") != 0)
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return 0;
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/* Find MMU PID size */
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prop = of_get_flat_dt_prop(node, "ibm,mmu-pid-bits", &size);
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if (prop && size == 4)
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mmu_pid_bits = be32_to_cpup(prop);
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/* Grab page size encodings */
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prop = of_get_flat_dt_prop(node, "ibm,processor-radix-AP-encodings", &size);
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if (!prop)
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return 0;
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@ -36,7 +36,7 @@ void subpage_prot_free(struct mm_struct *mm)
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}
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}
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addr = 0;
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for (i = 0; i < 2; ++i) {
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for (i = 0; i < (TASK_SIZE_USER64 >> 43); ++i) {
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p = spt->protptrs[i];
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if (!p)
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continue;
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@ -12,12 +12,12 @@
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <linux/memblock.h>
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#include <asm/ppc-opcode.h>
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#include <asm/ppc-opcode.h>
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#include <asm/tlb.h>
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#include <asm/tlbflush.h>
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#include <asm/trace.h>
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#include <asm/cputhreads.h>
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#define RIC_FLUSH_TLB 0
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#define RIC_FLUSH_PWC 1
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@ -454,3 +454,44 @@ void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm,
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else
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radix__flush_tlb_page_psize(mm, address, mmu_virtual_psize);
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}
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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extern void radix_kvm_prefetch_workaround(struct mm_struct *mm)
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{
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unsigned int pid = mm->context.id;
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if (unlikely(pid == MMU_NO_CONTEXT))
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return;
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/*
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* If this context hasn't run on that CPU before and KVM is
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* around, there's a slim chance that the guest on another
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* CPU just brought in obsolete translation into the TLB of
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* this CPU due to a bad prefetch using the guest PID on
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* the way into the hypervisor.
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*
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* We work around this here. If KVM is possible, we check if
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* any sibling thread is in KVM. If it is, the window may exist
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* and thus we flush that PID from the core.
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*
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* A potential future improvement would be to mark which PIDs
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* have never been used on the system and avoid it if the PID
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* is new and the process has no other cpumask bit set.
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*/
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if (cpu_has_feature(CPU_FTR_HVMODE) && radix_enabled()) {
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int cpu = smp_processor_id();
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int sib = cpu_first_thread_sibling(cpu);
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bool flush = false;
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for (; sib <= cpu_last_thread_sibling(cpu) && !flush; sib++) {
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if (sib == cpu)
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continue;
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if (paca[sib].kvm_hstate.kvm_vcpu)
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flush = true;
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}
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if (flush)
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_tlbiel_pid(pid, RIC_FLUSH_ALL);
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}
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}
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EXPORT_SYMBOL_GPL(radix_kvm_prefetch_workaround);
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#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
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@ -82,7 +82,6 @@ static int pSeries_reconfig_remove_node(struct device_node *np)
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of_detach_node(np);
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of_node_put(parent);
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of_node_put(np); /* Must decrement the refcount */
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return 0;
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}
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Block a user