drm/i915/gen12: Disable preemption timeout
Allow super long OpenCL workloads which cannot be preempted within the default timeout to run out of the box. v2: * Make it stick out more and apply only to RCS. (Chris) v3: * Mention platform override in kconfig. (Joonas) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Michal Mrozek <michal.mrozek@intel.com> Cc: <stable@vger.kernel.org> # v5.6+ Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Michal Mrozek <Michal.mrozek@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200312115748.29970-1-tvrtko.ursulin@linux.intel.com
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@ -41,6 +41,10 @@ config DRM_I915_PREEMPT_TIMEOUT
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May be 0 to disable the timeout.
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May be 0 to disable the timeout.
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The compiled in default may get overridden at driver probe time on
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certain platforms and certain engines which will be reflected in the
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sysfs control.
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config DRM_I915_MAX_REQUEST_BUSYWAIT
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config DRM_I915_MAX_REQUEST_BUSYWAIT
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int "Busywait for request completion limit (ns)"
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int "Busywait for request completion limit (ns)"
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default 8000 # nanoseconds
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default 8000 # nanoseconds
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@ -275,6 +275,7 @@ static void intel_engine_sanitize_mmio(struct intel_engine_cs *engine)
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static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
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static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
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{
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{
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const struct engine_info *info = &intel_engines[id];
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const struct engine_info *info = &intel_engines[id];
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struct drm_i915_private *i915 = gt->i915;
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struct intel_engine_cs *engine;
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struct intel_engine_cs *engine;
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BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
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BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
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@ -301,11 +302,11 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
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engine->id = id;
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engine->id = id;
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engine->legacy_idx = INVALID_ENGINE;
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engine->legacy_idx = INVALID_ENGINE;
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engine->mask = BIT(id);
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engine->mask = BIT(id);
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engine->i915 = gt->i915;
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engine->i915 = i915;
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engine->gt = gt;
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engine->gt = gt;
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engine->uncore = gt->uncore;
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engine->uncore = gt->uncore;
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engine->hw_id = engine->guc_id = info->hw_id;
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engine->hw_id = engine->guc_id = info->hw_id;
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engine->mmio_base = __engine_mmio_base(gt->i915, info->mmio_bases);
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engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases);
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engine->class = info->class;
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engine->class = info->class;
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engine->instance = info->instance;
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engine->instance = info->instance;
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@ -322,11 +323,15 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
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engine->props.timeslice_duration_ms =
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engine->props.timeslice_duration_ms =
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CONFIG_DRM_I915_TIMESLICE_DURATION;
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CONFIG_DRM_I915_TIMESLICE_DURATION;
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/* Override to uninterruptible for OpenCL workloads. */
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if (INTEL_GEN(i915) == 12 && engine->class == RENDER_CLASS)
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engine->props.preempt_timeout_ms = 0;
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engine->context_size = intel_engine_context_size(gt, engine->class);
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engine->context_size = intel_engine_context_size(gt, engine->class);
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if (WARN_ON(engine->context_size > BIT(20)))
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if (WARN_ON(engine->context_size > BIT(20)))
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engine->context_size = 0;
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engine->context_size = 0;
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if (engine->context_size)
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if (engine->context_size)
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DRIVER_CAPS(gt->i915)->has_logical_contexts = true;
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DRIVER_CAPS(i915)->has_logical_contexts = true;
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/* Nothing to do here, execute in order of dependencies */
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/* Nothing to do here, execute in order of dependencies */
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engine->schedule = NULL;
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engine->schedule = NULL;
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@ -342,7 +347,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
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gt->engine_class[info->class][info->instance] = engine;
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gt->engine_class[info->class][info->instance] = engine;
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gt->engine[id] = engine;
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gt->engine[id] = engine;
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gt->i915->engine[id] = engine;
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i915->engine[id] = engine;
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return 0;
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return 0;
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}
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}
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