net: hisilicon: Add group field to adapt HI13X1_GMAC
In general, group is the same as the port, but some boards specify a special group for better load balancing of each processing unit. Signed-off-by: Jiangfeng Xiao <xiaojiangfeng@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -178,6 +178,7 @@ struct hip04_priv {
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int phy_mode;
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int phy_mode;
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int chan;
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int chan;
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unsigned int port;
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unsigned int port;
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unsigned int group;
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unsigned int speed;
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unsigned int speed;
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unsigned int duplex;
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unsigned int duplex;
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unsigned int reg_inten;
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unsigned int reg_inten;
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@ -278,10 +279,10 @@ static void hip04_config_fifo(struct hip04_priv *priv)
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val |= PPE_CFG_STS_RX_PKT_CNT_RC;
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val |= PPE_CFG_STS_RX_PKT_CNT_RC;
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writel_relaxed(val, priv->base + PPE_CFG_STS_MODE);
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writel_relaxed(val, priv->base + PPE_CFG_STS_MODE);
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val = BIT(priv->port);
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val = BIT(priv->group);
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regmap_write(priv->map, priv->port * 4 + PPE_CFG_POOL_GRP, val);
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regmap_write(priv->map, priv->port * 4 + PPE_CFG_POOL_GRP, val);
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val = priv->port << PPE_CFG_QOS_VMID_GRP_SHIFT;
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val = priv->group << PPE_CFG_QOS_VMID_GRP_SHIFT;
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val |= PPE_CFG_QOS_VMID_MODE;
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val |= PPE_CFG_QOS_VMID_MODE;
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writel_relaxed(val, priv->base + PPE_CFG_QOS_VMID_GEN);
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writel_relaxed(val, priv->base + PPE_CFG_QOS_VMID_GEN);
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@ -876,7 +877,7 @@ static int hip04_mac_probe(struct platform_device *pdev)
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}
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}
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#endif
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#endif
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ret = of_parse_phandle_with_fixed_args(node, "port-handle", 2, 0, &arg);
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ret = of_parse_phandle_with_fixed_args(node, "port-handle", 3, 0, &arg);
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if (ret < 0) {
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if (ret < 0) {
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dev_warn(d, "no port-handle\n");
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dev_warn(d, "no port-handle\n");
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goto init_fail;
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goto init_fail;
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@ -884,6 +885,7 @@ static int hip04_mac_probe(struct platform_device *pdev)
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priv->port = arg.args[0];
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priv->port = arg.args[0];
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priv->chan = arg.args[1] * RX_DESC_NUM;
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priv->chan = arg.args[1] * RX_DESC_NUM;
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priv->group = arg.args[2];
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hrtimer_init(&priv->tx_coalesce_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
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hrtimer_init(&priv->tx_coalesce_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
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