forked from Minki/linux
V4L/DVB (6083): cx88-alsa: Rework buffer handling
Rework the way the DMA buffer is handled and IRQs are generated. ALSA uses a ring-buffer of multiple periods. Each period is supposed to corrispond to one IRQ. The existing driver was generating one interrupt per ring-buffer, as opposed to per period. This meant that as soon as the IRQ was generated, the hardware was already starting to re-write the beginning of the buffer. Since the DMA happens on a per-line basis, there was only a narrow window to copy the data out before the buffer was overwritten. The cx88 core RISC program generator is modified so that it can set the IRQ and counter flags to count every X lines of DMA transfer. This way we can generate an interrupt every period instead of every full ring-buffer. Right now only period of one line are supported, but it should be possible to support longer periods. Note that a WRITE instruction generates an IRQ when it starts, not when the transfer is finished. Thus to generate an IRQ when line X is done, one must set the IRQ flag on the instruction that starts line X+1, not the one that ends line X. Change the line size so that there are four lines in the SRAM FIFO. If there are not four lines, the analog output from the cx88's internal DACs is full of clicks and pops. Try to handle FIFO sync errors. Sometimes the chip generates many of these errors before audio data starts. Up to 50 sync errors will be ignored and the counter reset. Have the IRQ handler save the RISC counter to the chip struct, and then have the pointer callback use this to calculate the pointer position. We could read the counter from the pointer callback, but sometimes the sync errors on start up cause the counter to go crazy. ALSA sees this and thinks there has been an overrun. The IRQ hander can avoid saving the counter position on sync errors. The chip "opened" flag wasn't necessary. ALSA won't try to open the same substream multiple times. Probably this code was cut&pasted from the bt87x driver, which has multiple sub-streams for one chip. Do error checking for the videobuf mapping functions. snd_card_cx88_runtime_free() is useless and can be deleted. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
This commit is contained in:
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16cf1d0c5d
commit
05b2723387
@ -3,6 +3,7 @@
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* Support for audio capture
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* PCI function #1 of the cx2388x.
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*
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* (c) 2007 Trent Piepho <xyzzy@speakeasy.org>
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* (c) 2005,2006 Ricardo Cerqueira <v4l@cerqueira.org>
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* (c) 2005 Mauro Carvalho Chehab <mchehab@infradead.org>
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* Based on a dummy cx88 module by Gerd Knorr <kraxel@bytesex.org>
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@ -47,7 +48,6 @@
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#define dprintk_core(level,fmt, arg...) if (debug >= level) \
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printk(KERN_DEBUG "%s/1: " fmt, chip->core->name , ## arg)
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/****************************************************************************
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Data type declarations - Can be moded to a header file later
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****************************************************************************/
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@ -58,6 +58,7 @@
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struct cx88_audio_dev {
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struct cx88_core *core;
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struct cx88_dmaqueue q;
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u64 starttime;
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/* pci i/o */
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struct pci_dev *pci;
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@ -68,24 +69,20 @@ struct cx88_audio_dev {
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struct snd_card *card;
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spinlock_t reg_lock;
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atomic_t count;
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unsigned int dma_size;
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unsigned int period_size;
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unsigned int num_periods;
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struct videobuf_dmabuf dma_risc;
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struct videobuf_dmabuf dma_risc;
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int mixer_volume[MIXER_ADDR_LAST+1][2];
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int capture_source[MIXER_ADDR_LAST+1][2];
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long int read_count;
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long int read_offset;
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struct cx88_buffer *buf;
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long opened;
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struct snd_pcm_substream *substream;
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struct cx88_buffer *buf;
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struct snd_pcm_substream *substream;
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};
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typedef struct cx88_audio_dev snd_cx88_card_t;
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@ -146,16 +143,13 @@ static int _cx88_start_audio_dma(snd_cx88_card_t *chip)
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cx_write(MO_AUDD_LNGTH, buf->bpl);
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/* reset counter */
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cx_write(MO_AUDD_GPCNTRL,GP_COUNT_CONTROL_RESET);
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cx_write(MO_AUDD_GPCNTRL, GP_COUNT_CONTROL_RESET);
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atomic_set(&chip->count, 0);
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dprintk(1, "Start audio DMA, %d B/line, %d lines/FIFO, %d lines/irq, "
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"%d B/irq\n", buf->bpl, cx_read(audio_ch->cmds_start + 8)>>1,
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dprintk(1, "Start audio DMA, %d B/line, %d lines/FIFO, %d periods, %d "
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"byte buffer\n", buf->bpl, cx_read(audio_ch->cmds_start + 8)>>1,
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chip->num_periods, buf->bpl * chip->num_periods);
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dprintk(1, "Enabling IRQ, setting mask from 0x%x to 0x%x\n",
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chip->core->pci_irqmask,
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chip->core->pci_irqmask | PCI_INT_AUDINT);
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/* Enables corresponding bits at AUD_INT_STAT */
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cx_write(MO_AUD_INTMSK, AUD_INT_OPC_ERR | AUD_INT_DN_SYNC |
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AUD_INT_DN_RISCI2 | AUD_INT_DN_RISCI1);
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@ -198,7 +192,7 @@ static int _cx88_stop_audio_dma(snd_cx88_card_t *chip)
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return 0;
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}
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#define MAX_IRQ_LOOP 10
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#define MAX_IRQ_LOOP 50
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/*
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* BOARD Specific: IRQ dma bits
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@ -223,14 +217,11 @@ static void cx8801_aud_irq(snd_cx88_card_t *chip)
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{
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struct cx88_core *core = chip->core;
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u32 status, mask;
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u32 count;
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status = cx_read(MO_AUD_INTSTAT);
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mask = cx_read(MO_AUD_INTMSK);
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if (0 == (status & mask)) {
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spin_unlock(&chip->reg_lock);
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if (0 == (status & mask))
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return;
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}
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cx_write(MO_AUD_INTSTAT, status);
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if (debug > 1 || (status & mask & ~0xff))
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cx88_print_irqbits(core->name, "irq aud",
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@ -238,27 +229,20 @@ static void cx8801_aud_irq(snd_cx88_card_t *chip)
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status, mask);
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/* risc op code error */
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if (status & AUD_INT_OPC_ERR) {
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printk(KERN_WARNING "%s/0: audio risc op code error\n",core->name);
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printk(KERN_WARNING "%s/1: Audio risc op code error\n",core->name);
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cx_clear(MO_AUD_DMACNTRL, 0x11);
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cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH25]);
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}
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if (status & AUD_INT_DN_SYNC) {
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dprintk(1, "Downstream sync error\n");
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cx_write(MO_AUDD_GPCNTRL, GP_COUNT_CONTROL_RESET);
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return;
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}
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/* risc1 downstream */
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if (status & AUD_INT_DN_RISCI1) {
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spin_lock(&chip->reg_lock);
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count = cx_read(MO_AUDD_GPCNT);
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spin_unlock(&chip->reg_lock);
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if (chip->read_count == 0)
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chip->read_count += chip->dma_size;
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}
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if (chip->read_count >= chip->period_size) {
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dprintk(2, "Elapsing period\n");
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atomic_set(&chip->count, cx_read(MO_AUDD_GPCNT));
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snd_pcm_period_elapsed(chip->substream);
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}
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dprintk(3,"Leaving audio IRQ handler...\n");
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/* FIXME: Any other status should deserve a special handling? */
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}
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@ -277,23 +261,20 @@ static irqreturn_t cx8801_irq(int irq, void *dev_id)
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(core->pci_irqmask | PCI_INT_AUDINT);
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if (0 == status)
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goto out;
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dprintk( 3, "cx8801_irq\n" );
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dprintk( 3, " loop: %d/%d\n", loop, MAX_IRQ_LOOP );
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dprintk( 3, " status: %d\n", status );
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dprintk(3, "cx8801_irq loop %d/%d, status %x\n",
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loop, MAX_IRQ_LOOP, status);
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handled = 1;
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cx_write(MO_PCI_INTSTAT, status);
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if (status & core->pci_irqmask)
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cx88_core_irq(core, status);
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if (status & PCI_INT_AUDINT) {
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dprintk( 2, " ALSA IRQ handling\n" );
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if (status & PCI_INT_AUDINT)
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cx8801_aud_irq(chip);
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}
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};
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}
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if (MAX_IRQ_LOOP == loop) {
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dprintk( 0, "clearing mask\n" );
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dprintk(1,"%s/0: irq loop -- clearing mask\n",
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printk(KERN_ERR
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"%s/1: IRQ loop detected, disabling interrupts\n",
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core->name);
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cx_clear(MO_PCI_INTMSK, PCI_INT_AUDINT);
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}
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@ -315,7 +296,7 @@ static int dsp_buffer_free(snd_cx88_card_t *chip)
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chip->dma_size = 0;
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return 0;
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return 0;
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}
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/****************************************************************************
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@ -325,6 +306,7 @@ static int dsp_buffer_free(snd_cx88_card_t *chip)
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/*
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* Digital hardware definition
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*/
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#define DEFAULT_FIFO_SIZE 4096
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static struct snd_pcm_hardware snd_cx88_digital_hw = {
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.info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_INTERLEAVED |
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@ -337,19 +319,15 @@ static struct snd_pcm_hardware snd_cx88_digital_hw = {
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.rate_max = 48000,
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.channels_min = 2,
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.channels_max = 2,
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.buffer_bytes_max = (2*2048),
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.period_bytes_min = 2048,
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.period_bytes_max = 2048,
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.periods_min = 2,
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.periods_max = 2,
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/* Analog audio output will be full of clicks and pops if there
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are not exactly four lines in the SRAM FIFO buffer. */
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.period_bytes_min = DEFAULT_FIFO_SIZE/4,
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.period_bytes_max = DEFAULT_FIFO_SIZE/4,
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.periods_min = 1,
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.periods_max = 1024,
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.buffer_bytes_max = (1024*1024),
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};
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/*
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* audio pcm capture runtime free
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*/
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static void snd_card_cx88_runtime_free(struct snd_pcm_runtime *runtime)
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{
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}
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/*
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* audio pcm capture open callback
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*/
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@ -359,26 +337,24 @@ static int snd_cx88_pcm_open(struct snd_pcm_substream *substream)
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struct snd_pcm_runtime *runtime = substream->runtime;
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int err;
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if (test_and_set_bit(0, &chip->opened))
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return -EBUSY;
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err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
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err = snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIODS);
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if (err < 0)
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goto _error;
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chip->substream = substream;
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chip->read_count = 0;
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chip->read_offset = 0;
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runtime->private_free = snd_card_cx88_runtime_free;
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runtime->hw = snd_cx88_digital_hw;
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if (cx88_sram_channels[SRAM_CH25].fifo_size != DEFAULT_FIFO_SIZE) {
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unsigned int bpl = cx88_sram_channels[SRAM_CH25].fifo_size / 4;
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bpl &= ~7; /* must be multiple of 8 */
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runtime->hw.period_bytes_min = bpl;
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runtime->hw.period_bytes_max = bpl;
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}
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return 0;
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_error:
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dprintk(1,"Error opening PCM!\n");
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clear_bit(0, &chip->opened);
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smp_mb__after_clear_bit();
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return err;
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}
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@ -387,11 +363,6 @@ _error:
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*/
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static int snd_cx88_close(struct snd_pcm_substream *substream)
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{
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snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
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clear_bit(0, &chip->opened);
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smp_mb__after_clear_bit();
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return 0;
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}
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@ -403,54 +374,61 @@ static int snd_cx88_hw_params(struct snd_pcm_substream * substream,
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{
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snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
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struct cx88_buffer *buf;
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int ret;
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if (substream->runtime->dma_area) {
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dsp_buffer_free(chip);
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substream->runtime->dma_area = NULL;
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}
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chip->period_size = params_period_bytes(hw_params);
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chip->num_periods = params_periods(hw_params);
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chip->dma_size = chip->period_size * params_periods(hw_params);
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BUG_ON(!chip->dma_size);
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BUG_ON(chip->num_periods & (chip->num_periods-1));
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dprintk(1,"Setting buffer\n");
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buf = kzalloc(sizeof(*buf),GFP_KERNEL);
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buf = kzalloc(sizeof(*buf), GFP_KERNEL);
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if (NULL == buf)
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return -ENOMEM;
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buf->vb.memory = V4L2_MEMORY_MMAP;
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buf->vb.field = V4L2_FIELD_NONE;
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buf->vb.width = chip->period_size;
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buf->bpl = chip->period_size;
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buf->vb.height = chip->num_periods;
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buf->vb.size = chip->dma_size;
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buf->vb.field = V4L2_FIELD_NONE;
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videobuf_dma_init(&buf->vb.dma);
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videobuf_dma_init_kernel(&buf->vb.dma,PCI_DMA_FROMDEVICE,
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ret = videobuf_dma_init_kernel(&buf->vb.dma, PCI_DMA_FROMDEVICE,
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(PAGE_ALIGN(buf->vb.size) >> PAGE_SHIFT));
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if (ret < 0)
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goto error;
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videobuf_pci_dma_map(chip->pci,&buf->vb.dma);
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ret = videobuf_pci_dma_map(chip->pci,&buf->vb.dma);
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if (ret < 0)
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goto error;
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ret = cx88_risc_databuffer(chip->pci, &buf->risc, buf->vb.dma.sglist,
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buf->vb.width, buf->vb.height, 1);
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if (ret < 0)
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goto error;
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cx88_risc_databuffer(chip->pci, &buf->risc,
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buf->vb.dma.sglist,
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buf->vb.width, buf->vb.height);
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buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
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/* Loop back to start of program */
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buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP|RISC_IRQ1|RISC_CNT_INC);
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buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
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buf->vb.state = STATE_PREPARED;
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buf->bpl = chip->period_size;
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chip->buf = buf;
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chip->dma_risc = buf->vb.dma;
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dprintk(1,"Buffer ready at %u\n",chip->dma_risc.nr_pages);
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substream->runtime->dma_area = chip->dma_risc.vmalloc;
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return 0;
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error:
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kfree(buf);
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return ret;
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}
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/*
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@ -477,7 +455,6 @@ static int snd_cx88_prepare(struct snd_pcm_substream *substream)
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return 0;
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}
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/*
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* trigger callback
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*/
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@ -486,6 +463,7 @@ static int snd_cx88_card_trigger(struct snd_pcm_substream *substream, int cmd)
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snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
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int err;
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/* Local interrupts are already disabled by ALSA */
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spin_lock(&chip->reg_lock);
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switch (cmd) {
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@ -512,17 +490,14 @@ static snd_pcm_uframes_t snd_cx88_pointer(struct snd_pcm_substream *substream)
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{
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snd_cx88_card_t *chip = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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u16 count;
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if (chip->read_count) {
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chip->read_count -= snd_pcm_lib_period_bytes(substream);
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chip->read_offset += snd_pcm_lib_period_bytes(substream);
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if (chip->read_offset == chip->dma_size)
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chip->read_offset = 0;
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}
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dprintk(2, "Pointer time, will return %li, read %li\n",chip->read_offset,chip->read_count);
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return bytes_to_frames(runtime, chip->read_offset);
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count = atomic_read(&chip->count);
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// dprintk(2, "%s - count %d (+%u), period %d, frame %lu\n", __FUNCTION__,
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// count, new, count & (runtime->periods-1),
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// runtime->period_size * (count & (runtime->periods-1)));
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return runtime->period_size * (count & (runtime->periods-1));
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}
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/*
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@ -592,10 +567,13 @@ static int snd_cx88_capture_volume_put(struct snd_kcontrol *kcontrol,
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int v;
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u32 old_control;
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/* Do we really know this will always be called with IRQs on? */
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spin_lock_irq(&chip->reg_lock);
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old_control = 0x3f - (cx_read(AUD_VOL_CTL) & 0x3f);
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v = 0x3f - (value->value.integer.value[0] & 0x3f);
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cx_andor(AUD_VOL_CTL, 0x3f, v);
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spin_unlock_irq(&chip->reg_lock);
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return v != old_control;
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@ -68,13 +68,15 @@ static DEFINE_MUTEX(devlist);
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#define NO_SYNC_LINE (-1U)
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/* @lpi: lines per IRQ, or 0 to not generate irqs. Note: IRQ to be
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generated _after_ lpi lines are transferred. */
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static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
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unsigned int offset, u32 sync_line,
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unsigned int bpl, unsigned int padding,
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unsigned int lines)
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unsigned int lines, unsigned int lpi)
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{
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struct scatterlist *sg;
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unsigned int line,todo;
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unsigned int line,todo,sol;
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/* sync instruction */
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if (sync_line != NO_SYNC_LINE)
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@ -87,15 +89,19 @@ static u32* cx88_risc_field(u32 *rp, struct scatterlist *sglist,
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offset -= sg_dma_len(sg);
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sg++;
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}
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if (lpi && line>0 && !(line % lpi))
|
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sol = RISC_SOL | RISC_IRQ1 | RISC_CNT_INC;
|
||||
else
|
||||
sol = RISC_SOL;
|
||||
if (bpl <= sg_dma_len(sg)-offset) {
|
||||
/* fits into current chunk */
|
||||
*(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|RISC_EOL|bpl);
|
||||
*(rp++)=cpu_to_le32(RISC_WRITE|sol|RISC_EOL|bpl);
|
||||
*(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
|
||||
offset+=bpl;
|
||||
} else {
|
||||
/* scanline needs to be split */
|
||||
todo = bpl;
|
||||
*(rp++)=cpu_to_le32(RISC_WRITE|RISC_SOL|
|
||||
*(rp++)=cpu_to_le32(RISC_WRITE|sol|
|
||||
(sg_dma_len(sg)-offset));
|
||||
*(rp++)=cpu_to_le32(sg_dma_address(sg)+offset);
|
||||
todo -= (sg_dma_len(sg)-offset);
|
||||
@ -146,10 +152,10 @@ int cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
rp = risc->cpu;
|
||||
if (UNSET != top_offset)
|
||||
rp = cx88_risc_field(rp, sglist, top_offset, 0,
|
||||
bpl, padding, lines);
|
||||
bpl, padding, lines, 0);
|
||||
if (UNSET != bottom_offset)
|
||||
rp = cx88_risc_field(rp, sglist, bottom_offset, 0x200,
|
||||
bpl, padding, lines);
|
||||
bpl, padding, lines, 0);
|
||||
|
||||
/* save pointer to jmp instruction address */
|
||||
risc->jmp = rp;
|
||||
@ -159,7 +165,7 @@ int cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
|
||||
int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
struct scatterlist *sglist, unsigned int bpl,
|
||||
unsigned int lines)
|
||||
unsigned int lines, unsigned int lpi)
|
||||
{
|
||||
u32 instructions;
|
||||
u32 *rp;
|
||||
@ -176,7 +182,7 @@ int cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
|
||||
/* write risc instructions */
|
||||
rp = risc->cpu;
|
||||
rp = cx88_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines);
|
||||
rp = cx88_risc_field(rp, sglist, 0, NO_SYNC_LINE, bpl, 0, lines, lpi);
|
||||
|
||||
/* save pointer to jmp instruction address */
|
||||
risc->jmp = rp;
|
||||
|
@ -253,7 +253,7 @@ int cx8802_buf_prepare(struct videobuf_queue *q, struct cx8802_dev *dev,
|
||||
goto fail;
|
||||
cx88_risc_databuffer(dev->pci, &buf->risc,
|
||||
buf->vb.dma.sglist,
|
||||
buf->vb.width, buf->vb.height);
|
||||
buf->vb.width, buf->vb.height, 0);
|
||||
}
|
||||
buf->vb.state = STATE_PREPARED;
|
||||
return 0;
|
||||
|
@ -519,7 +519,7 @@ cx88_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
extern int
|
||||
cx88_risc_databuffer(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
struct scatterlist *sglist, unsigned int bpl,
|
||||
unsigned int lines);
|
||||
unsigned int lines, unsigned int lpi);
|
||||
extern int
|
||||
cx88_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
|
||||
u32 reg, u32 mask, u32 value);
|
||||
|
Loading…
Reference in New Issue
Block a user