ARC: Setup Vector Table Base in early boot
Otherwise early boot exceptions such as instructions errors due to configuration mismatch between kernel and hardware go off to la-la land, as opposed to hitting the handler and panic()'ing properly. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -27,6 +27,8 @@ stext:
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; Don't clobber r0-r4 yet. It might have bootloader provided info
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; Don't clobber r0-r4 yet. It might have bootloader provided info
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;-------------------------------------------------------------------
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;-------------------------------------------------------------------
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sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE]
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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; Only Boot (Master) proceeds. Others wait in platform dependent way
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; Only Boot (Master) proceeds. Others wait in platform dependent way
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; IDENTITY Reg [ 3 2 1 0 ]
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; IDENTITY Reg [ 3 2 1 0 ]
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@ -32,8 +32,6 @@ void __cpuinit arc_init_IRQ(void)
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{
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{
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int level_mask = 0;
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int level_mask = 0;
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write_aux_reg(AUX_INTR_VEC_BASE, _int_vec_base_lds);
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/* Disable all IRQs: enable them as devices request */
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/* Disable all IRQs: enable them as devices request */
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write_aux_reg(AUX_IENABLE, 0);
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write_aux_reg(AUX_IENABLE, 0);
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