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drm/amdgpu: store the mall size in the gmc structure

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This will be useful in future patches.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2022-03-31 18:11:51 -04:00
parent 8eece29c4e
commit 053d35dedd
2 changed files with 21 additions and 0 deletions
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3
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
View File

@ -257,6 +257,9 @@ struct amdgpu_gmc {
struct amdgpu_bo *pdb0_bo;
/* CPU kmapped address of pdb0*/
void *ptr_pdb0;
/* MALL size */
u64 mall_size;
};
#define amdgpu_gmc_flush_gpu_tlb(adev, vmid, vmhub, type) ((adev)->gmc.gmc_funcs->flush_gpu_tlb((adev), (vmid), (vmhub), (type)))

18
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
View File

@ -883,6 +883,24 @@ static int gmc_v10_0_sw_init(void *handle)
adev->gmc.vram_vendor = vram_vendor;
}
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(10, 3, 0):
adev->gmc.mall_size = 128 * 1024 * 1024;
break;
case IP_VERSION(10, 3, 2):
adev->gmc.mall_size = 96 * 1024 * 1024;
break;
case IP_VERSION(10, 3, 4):
adev->gmc.mall_size = 32 * 1024 * 1024;
break;
case IP_VERSION(10, 3, 5):
adev->gmc.mall_size = 16 * 1024 * 1024;
break;
default:
adev->gmc.mall_size = 0;
break;
}
switch (adev->ip_versions[GC_HWIP][0]) {
case IP_VERSION(10, 1, 10):
case IP_VERSION(10, 1, 1):