forked from Minki/linux
drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf
This patch applies a performance enhancement workaround based on analysis of DX and OCL S-Curve workloads. We increase the General Priority Credits for L3SQ from the hardware default of 56 to the max value 62, and decrease the High Priority credits from 8 to 2. v2: Only apply to B0 onwards v3: Move w/a to per engine init, ie bxt_init_workarounds Signed-off-by: Tim Gore <tim.gore@intel.com> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1461314761-36854-1-git-send-email-tim.gore@intel.com Reviewed-by: Michel Thierry <michel.thierry@intel.com>
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@ -6090,6 +6090,7 @@ enum skl_disp_power_wells {
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#define GEN8_L3SQCREG1 _MMIO(0xB100)
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#define BDW_WA_L3SQCREG1_DEFAULT 0x784000
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#define BXT_WA_L3SQCREG1_DEFAULT 0xF84000
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#define GEN7_L3CNTLREG1 _MMIO(0xB01C)
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#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C47FF8C
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@ -1180,6 +1180,10 @@ static int bxt_init_workarounds(struct intel_engine_cs *engine)
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return ret;
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}
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/* WaProgramL3SqcReg1DefaultForPerf:bxt */
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if (IS_BXT_REVID(dev, BXT_REVID_B0, REVID_FOREVER))
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I915_WRITE(GEN8_L3SQCREG1, BXT_WA_L3SQCREG1_DEFAULT);
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return 0;
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}
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