forked from Minki/linux
drm/amdgpu/gfx8: fix priv reg interrupt enable
Looks like a copy/paste typo. Reviewed-by: Christian König <christian.koenig@amd.com> Noticed-by: David Panariti <David.Panariti@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
e1d09dc0cc
commit
04ab3b7622
@ -4995,7 +4995,7 @@ static int gfx_v8_0_set_priv_reg_fault_state(struct amdgpu_device *adev,
|
||||
case AMDGPU_IRQ_STATE_ENABLE:
|
||||
cp_int_cntl = RREG32(mmCP_INT_CNTL_RING0);
|
||||
cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,
|
||||
PRIV_REG_INT_ENABLE, 0);
|
||||
PRIV_REG_INT_ENABLE, 1);
|
||||
WREG32(mmCP_INT_CNTL_RING0, cp_int_cntl);
|
||||
break;
|
||||
default:
|
||||
|
Loading…
Reference in New Issue
Block a user