[SCSI] qla2xxx: Remove unnecessary spinlock primitive - mbx_reg_lock.
Since, mailbox commands are executed in a synchronous manner, there is no need to have a separate spinlock primitive to protect data/register access shared by callers. Signed-off-by: Seokmann Ju <seokmann.ju@qlogic.com> Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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@ -2338,8 +2338,6 @@ typedef struct scsi_qla_host {
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#define MBX_INTR_WAIT 2
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#define MBX_INTR_WAIT 2
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#define MBX_UPDATE_FLASH_ACTIVE 3
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#define MBX_UPDATE_FLASH_ACTIVE 3
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spinlock_t mbx_reg_lock; /* Mbx Cmd Register Lock */
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struct semaphore mbx_cmd_sem; /* Serialialize mbx access */
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struct semaphore mbx_cmd_sem; /* Serialialize mbx access */
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struct semaphore mbx_intr_sem; /* Used for completion notification */
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struct semaphore mbx_intr_sem; /* Used for completion notification */
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@ -86,12 +86,8 @@ qla2100_intr_handler(int irq, void *dev_id)
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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spin_lock_irqsave(&ha->mbx_reg_lock, flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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up(&ha->mbx_intr_sem);
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up(&ha->mbx_intr_sem);
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spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
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}
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}
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return (IRQ_HANDLED);
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return (IRQ_HANDLED);
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@ -197,12 +193,8 @@ qla2300_intr_handler(int irq, void *dev_id)
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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spin_lock_irqsave(&ha->mbx_reg_lock, flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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up(&ha->mbx_intr_sem);
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up(&ha->mbx_intr_sem);
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spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
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}
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}
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return (IRQ_HANDLED);
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return (IRQ_HANDLED);
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@ -1491,12 +1483,8 @@ qla24xx_intr_handler(int irq, void *dev_id)
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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spin_lock_irqsave(&ha->mbx_reg_lock, flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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up(&ha->mbx_intr_sem);
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up(&ha->mbx_intr_sem);
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spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
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}
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}
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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@ -1629,12 +1617,8 @@ qla24xx_msix_default(int irq, void *dev_id)
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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(status & MBX_INTERRUPT) && ha->flags.mbox_int) {
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spin_lock_irqsave(&ha->mbx_reg_lock, flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
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up(&ha->mbx_intr_sem);
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up(&ha->mbx_intr_sem);
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spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
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}
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}
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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@ -55,7 +55,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
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uint16_t __iomem *optr;
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uint16_t __iomem *optr;
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uint32_t cnt;
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uint32_t cnt;
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uint32_t mboxes;
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uint32_t mboxes;
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unsigned long mbx_flags = 0;
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unsigned long wait_time;
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unsigned long wait_time;
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rval = QLA_SUCCESS;
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rval = QLA_SUCCESS;
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@ -81,10 +80,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
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/* Save mailbox command for debug */
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/* Save mailbox command for debug */
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ha->mcp = mcp;
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ha->mcp = mcp;
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/* Try to get mailbox register access */
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if (!abort_active)
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spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
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DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
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DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
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ha->host_no, mcp->mb[0]));
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ha->host_no, mcp->mb[0]));
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@ -161,9 +156,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
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WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
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WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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if (!abort_active)
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spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
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/* Wait for either the timer to expire
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/* Wait for either the timer to expire
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* or the mbox completion interrupt
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* or the mbox completion interrupt
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*/
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*/
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@ -184,8 +176,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
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else
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else
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WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
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WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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if (!abort_active)
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spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
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wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
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wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
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while (!ha->flags.mbox_int) {
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while (!ha->flags.mbox_int) {
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@ -201,9 +191,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
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} /* while */
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} /* while */
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}
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}
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if (!abort_active)
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spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
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/* Check whether we timed out */
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/* Check whether we timed out */
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if (ha->flags.mbox_int) {
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if (ha->flags.mbox_int) {
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uint16_t *iptr2;
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uint16_t *iptr2;
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@ -256,9 +243,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
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rval = QLA_FUNCTION_TIMEOUT;
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rval = QLA_FUNCTION_TIMEOUT;
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}
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}
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if (!abort_active)
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spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
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ha->flags.mbox_busy = 0;
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ha->flags.mbox_busy = 0;
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/* Clean up */
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/* Clean up */
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@ -1563,14 +1563,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
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INIT_LIST_HEAD(&ha->list);
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INIT_LIST_HEAD(&ha->list);
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INIT_LIST_HEAD(&ha->fcports);
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INIT_LIST_HEAD(&ha->fcports);
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/*
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* These locks are used to prevent more than one CPU
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* from modifying the queue at the same time. The
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* higher level "host_lock" will reduce most
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* contention for these locks.
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*/
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spin_lock_init(&ha->mbx_reg_lock);
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qla2x00_config_dma_addressing(ha);
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qla2x00_config_dma_addressing(ha);
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if (qla2x00_mem_alloc(ha)) {
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if (qla2x00_mem_alloc(ha)) {
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qla_printk(KERN_WARNING, ha,
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qla_printk(KERN_WARNING, ha,
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