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xtensa: don't use l32r opcode directly

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xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2018-12-05 12:48:19 -08:00
parent f37598be4e
commit 0376027051
4 changed files with 24 additions and 31 deletions
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29
arch/xtensa/boot/boot-elf/bootstrap.S
View File

@ -29,17 +29,7 @@ _ResetVector:
.begin no-absolute-literals .begin no-absolute-literals
.literal_position .literal_position
#if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \ #ifdef CONFIG_PARSE_BOOTPARAM
XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
.literal RomInitAddr, CONFIG_KERNEL_LOAD_ADDRESS
#else
.literal RomInitAddr, KERNELOFFSET
#endif
#ifndef CONFIG_PARSE_BOOTPARAM
.literal RomBootParam, 0
#else
.literal RomBootParam, _bootparam
.align 4 .align 4
_bootparam: _bootparam:
.short BP_TAG_FIRST .short BP_TAG_FIRST
@ -66,13 +56,22 @@ _SetupMMU:
initialize_mmu initialize_mmu
#endif #endif
.end no-absolute-literals
rsil a0, XCHAL_DEBUGLEVEL-1 rsil a0, XCHAL_DEBUGLEVEL-1
rsync rsync
reset: reset:
l32r a0, RomInitAddr #if defined(CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) && \
l32r a2, RomBootParam XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY
movi a0, CONFIG_KERNEL_LOAD_ADDRESS
#else
movi a0, KERNELOFFSET
#endif
#ifdef CONFIG_PARSE_BOOTPARAM
movi a2, _bootparam
#else
movi a2, 0
#endif
movi a3, 0 movi a3, 0
movi a4, 0 movi a4, 0
jx a0 jx a0
.end no-absolute-literals

8
arch/xtensa/include/asm/futex.h
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@ -32,8 +32,8 @@
"3:\n" \ "3:\n" \
" .section .fixup,\"ax\"\n" \ " .section .fixup,\"ax\"\n" \
" .align 4\n" \ " .align 4\n" \
"4: .long 3b\n" \ " .literal_position\n" \
"5: l32r %0, 4b\n" \ "5: movi %0, 3b\n" \
" movi %1, %3\n" \ " movi %1, %3\n" \
" jx %0\n" \ " jx %0\n" \
" .previous\n" \ " .previous\n" \
@ -108,8 +108,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
"2:\n" "2:\n"
" .section .fixup,\"ax\"\n" " .section .fixup,\"ax\"\n"
" .align 4\n" " .align 4\n"
"3: .long 2b\n" " .literal_position\n"
"4: l32r %1, 3b\n" "4: movi %1, 2b\n"
" movi %0, %7\n" " movi %0, %7\n"
" jx %1\n" " jx %1\n"
" .previous\n" " .previous\n"

10
arch/xtensa/include/asm/uaccess.h
View File

@ -159,10 +159,9 @@ __asm__ __volatile__( \
"2: \n" \ "2: \n" \
" .section .fixup,\"ax\" \n" \ " .section .fixup,\"ax\" \n" \
" .align 4 \n" \ " .align 4 \n" \
"4: \n" \ " .literal_position \n" \
" .long 2b \n" \
"5: \n" \ "5: \n" \
" l32r %1, 4b \n" \ " movi %1, 2b \n" \
" movi %0, %4 \n" \ " movi %0, %4 \n" \
" jx %1 \n" \ " jx %1 \n" \
" .previous \n" \ " .previous \n" \
@ -217,10 +216,9 @@ __asm__ __volatile__( \
"2: \n" \ "2: \n" \
" .section .fixup,\"ax\" \n" \ " .section .fixup,\"ax\" \n" \
" .align 4 \n" \ " .align 4 \n" \
"4: \n" \ " .literal_position \n" \
" .long 2b \n" \
"5: \n" \ "5: \n" \
" l32r %1, 4b \n" \ " movi %1, 2b \n" \
" movi %2, 0 \n" \ " movi %2, 0 \n" \
" movi %0, %4 \n" \ " movi %0, %4 \n" \
" jx %1 \n" \ " jx %1 \n" \

8
arch/xtensa/kernel/head.S
View File

@ -59,10 +59,6 @@ ENTRY(_start)
.align 4 .align 4
.literal_position .literal_position
.Lstartup:
.word _startup
.align 4
_SetupOCD: _SetupOCD:
/* /*
* Initialize WB, WS, and clear PS.EXCM (to allow loop instructions). * Initialize WB, WS, and clear PS.EXCM (to allow loop instructions).
@ -99,12 +95,12 @@ _SetupMMU:
1: 1:
#endif #endif
#endif #endif
.end no-absolute-literals
l32r a0, .Lstartup movi a0, _startup
jx a0 jx a0
ENDPROC(_start) ENDPROC(_start)
.end no-absolute-literals
__REF __REF
.literal_position .literal_position