i40e: remove and fix confusing define name

I40E_ITR_NONE was being used as an ITRN register index by
accident because it was easily associated with the I40E_RX_ITR
and friends defines.

Change the name slightly in order to make it clear that
I40E_ITR_NONE is really associated with the DYN_CTL register
sets.

Change-Id: I04702c027c7495b90a8bf2db85d3e085a2c7d02a
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: Kavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Jesse Brandeburg 2013-11-20 10:03:09 +00:00 committed by Jeff Kirsher
parent 1fa18370e4
commit 0319577f89

View File

@ -49,10 +49,23 @@
#define I40E_QUEUE_END_OF_LIST 0x7FF
#define I40E_ITR_NONE 3
#define I40E_RX_ITR 0
#define I40E_TX_ITR 1
#define I40E_PE_ITR 2
/* this enum matches hardware bits and is meant to be used by DYN_CTLN
* registers and QINT registers or more generally anywhere in the manual
* mentioning ITR_INDX, ITR_NONE cannot be used as an index 'n' into any
* register but instead is a special value meaning "don't update" ITR0/1/2.
*/
enum i40e_dyn_idx_t {
I40E_IDX_ITR0 = 0,
I40E_IDX_ITR1 = 1,
I40E_IDX_ITR2 = 2,
I40E_ITR_NONE = 3 /* ITR_NONE must not be used as an index */
};
/* these are indexes into ITRN registers */
#define I40E_RX_ITR I40E_IDX_ITR0
#define I40E_TX_ITR I40E_IDX_ITR1
#define I40E_PE_ITR I40E_IDX_ITR2
/* Supported Rx Buffer Sizes */
#define I40E_RXBUFFER_512 512 /* Used for packet split */
#define I40E_RXBUFFER_2048 2048