forked from Minki/linux
drm/msm/mdp5: Add hardware configuration for msm8x16
This change adds the hw configuration for msm8x16 chipsets in mdp5_cfg module. Note that only one external display interface is present in this configuration (DSI) but has not been enabled yet. It will be enabled once drm/msm driver supports DSI connectors. v2: add CTL flush register's hardware mask [pointed by Archit] Signed-off-by: Stephane Viau <sviau@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014 The Linux Foundation. All rights reserved.
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* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@ -150,10 +150,60 @@ const struct mdp5_cfg_hw apq8084_config = {
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.max_clk = 320000000,
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};
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const struct mdp5_cfg_hw msm8x16_config = {
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.name = "msm8x16",
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.mdp = {
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.count = 1,
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.base = { 0x01000 },
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},
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.smp = {
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.mmb_count = 8,
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.mmb_size = 8192,
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.clients = {
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[SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
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[SSPP_RGB0] = 7, [SSPP_RGB1] = 8,
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},
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},
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.ctl = {
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.count = 5,
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.base = { 0x02000, 0x02200, 0x02400, 0x02600, 0x02800 },
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.flush_hw_mask = 0x4003ffff,
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},
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.pipe_vig = {
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.count = 1,
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.base = { 0x05000 },
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},
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.pipe_rgb = {
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.count = 2,
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.base = { 0x15000, 0x17000 },
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},
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.pipe_dma = {
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.count = 1,
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.base = { 0x25000 },
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},
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.lm = {
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.count = 2, /* LM0 and LM3 */
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.base = { 0x45000, 0x48000 },
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.nb_stages = 5,
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},
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.dspp = {
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.count = 1,
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.base = { 0x55000 },
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},
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.intf = {
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.count = 1, /* INTF_1 */
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.base = { 0x6B800 },
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},
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/* TODO enable .intfs[] with [1] = INTF_DSI, once DSI is implemented */
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.max_clk = 320000000,
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};
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static const struct mdp5_cfg_handler cfg_handlers[] = {
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{ .revision = 0, .config = { .hw = &msm8x74_config } },
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{ .revision = 2, .config = { .hw = &msm8x74_config } },
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{ .revision = 3, .config = { .hw = &apq8084_config } },
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{ .revision = 6, .config = { .hw = &msm8x16_config } },
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};
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