forked from Minki/linux
net: mvneta: use phylink_generic_validate()
Convert mvneta to use phylink_generic_validate() for the bulk of its validate() implementation. This network adapter has a restriction that for 802.3z links, autonegotiation must be enabled. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -3823,8 +3823,6 @@ static void mvneta_validate(struct phylink_config *config,
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unsigned long *supported,
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struct phylink_link_state *state)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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/* We only support QSGMII, SGMII, 802.3z and RGMII modes.
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* When in 802.3z mode, we must have AN enabled:
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* "Bit 2 Field InBandAnEn In-band Auto-Negotiation enable. ...
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@ -3836,34 +3834,7 @@ static void mvneta_validate(struct phylink_config *config,
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return;
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}
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/* Allow all the expected bits */
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phylink_set(mask, Autoneg);
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phylink_set_port_modes(mask);
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/* Asymmetric pause is unsupported */
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phylink_set(mask, Pause);
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/* Half-duplex at speeds higher than 100Mbit is unsupported */
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if (state->interface != PHY_INTERFACE_MODE_2500BASEX) {
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phylink_set(mask, 1000baseT_Full);
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phylink_set(mask, 1000baseX_Full);
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}
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if (state->interface == PHY_INTERFACE_MODE_2500BASEX) {
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phylink_set(mask, 2500baseT_Full);
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phylink_set(mask, 2500baseX_Full);
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}
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if (!phy_interface_mode_is_8023z(state->interface)) {
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/* 10M and 100M are only supported in non-802.3z mode */
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phylink_set(mask, 10baseT_Half);
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Half);
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phylink_set(mask, 100baseT_Full);
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}
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linkmode_and(supported, supported, mask);
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linkmode_and(state->advertising, state->advertising, mask);
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phylink_generic_validate(config, supported, state);
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}
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static void mvneta_mac_pcs_get_state(struct phylink_config *config,
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@ -5166,6 +5137,9 @@ static int mvneta_probe(struct platform_device *pdev)
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pp->phylink_config.dev = &dev->dev;
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pp->phylink_config.type = PHYLINK_NETDEV;
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pp->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_10 |
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MAC_100 | MAC_1000FD | MAC_2500FD;
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phy_interface_set_rgmii(pp->phylink_config.supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_QSGMII,
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pp->phylink_config.supported_interfaces);
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