net: phy: lxt: implement generic .handle_interrupt() callback
In an attempt to actually support shared IRQs in phylib, we now move the responsibility of triggering the phylib state machine or just returning IRQ_NONE, based on the IRQ status register, to the PHY driver. Having 3 different IRQ handling callbacks (.handle_interrupt(), .did_interrupt() and .ack_interrupt() ) is confusing so let the PHY driver implement directly an IRQ handler like any other device driver. Make this driver follow the new convention. Cc: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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committed by
Jakub Kicinski
parent
1f6d0f267a
commit
01c4a00bf3
@@ -37,6 +37,8 @@
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#define MII_LXT970_ISR 18 /* Interrupt Status Register */
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#define MII_LXT970_ISR 18 /* Interrupt Status Register */
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#define MII_LXT970_IRS_MINT BIT(15)
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#define MII_LXT970_CONFIG 19 /* Configuration Register */
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#define MII_LXT970_CONFIG 19 /* Configuration Register */
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/* ------------------------------------------------------------------------- */
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/* ------------------------------------------------------------------------- */
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@@ -47,6 +49,7 @@
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#define MII_LXT971_IER_IEN 0x00f2
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#define MII_LXT971_IER_IEN 0x00f2
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#define MII_LXT971_ISR 19 /* Interrupt Status Register */
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#define MII_LXT971_ISR 19 /* Interrupt Status Register */
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#define MII_LXT971_ISR_MASK 0x00f0
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/* register definitions for the 973 */
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/* register definitions for the 973 */
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#define MII_LXT973_PCR 16 /* Port Configuration Register */
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#define MII_LXT973_PCR 16 /* Port Configuration Register */
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@@ -81,6 +84,33 @@ static int lxt970_config_intr(struct phy_device *phydev)
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return phy_write(phydev, MII_LXT970_IER, 0);
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return phy_write(phydev, MII_LXT970_IER, 0);
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}
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}
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static irqreturn_t lxt970_handle_interrupt(struct phy_device *phydev)
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{
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int irq_status;
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/* The interrupt status register is cleared by reading BMSR
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* followed by MII_LXT970_ISR
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*/
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irq_status = phy_read(phydev, MII_BMSR);
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if (irq_status < 0) {
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phy_error(phydev);
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return IRQ_NONE;
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}
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irq_status = phy_read(phydev, MII_LXT970_ISR);
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if (irq_status < 0) {
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phy_error(phydev);
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return IRQ_NONE;
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}
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if (!(irq_status & MII_LXT970_IRS_MINT))
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return IRQ_NONE;
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phy_trigger_machine(phydev);
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return IRQ_HANDLED;
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}
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static int lxt970_config_init(struct phy_device *phydev)
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static int lxt970_config_init(struct phy_device *phydev)
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{
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{
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return phy_write(phydev, MII_LXT970_CONFIG, 0);
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return phy_write(phydev, MII_LXT970_CONFIG, 0);
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@@ -105,6 +135,24 @@ static int lxt971_config_intr(struct phy_device *phydev)
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return phy_write(phydev, MII_LXT971_IER, 0);
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return phy_write(phydev, MII_LXT971_IER, 0);
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}
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}
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static irqreturn_t lxt971_handle_interrupt(struct phy_device *phydev)
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{
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int irq_status;
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irq_status = phy_read(phydev, MII_LXT971_ISR);
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if (irq_status < 0) {
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phy_error(phydev);
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return IRQ_NONE;
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}
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if (!(irq_status & MII_LXT971_ISR_MASK))
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return IRQ_NONE;
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phy_trigger_machine(phydev);
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return IRQ_HANDLED;
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}
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/*
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/*
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* A2 version of LXT973 chip has an ERRATA: it randomly return the contents
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* A2 version of LXT973 chip has an ERRATA: it randomly return the contents
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* of the previous even register when you read a odd register regularly
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* of the previous even register when you read a odd register regularly
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@@ -239,6 +287,7 @@ static struct phy_driver lxt97x_driver[] = {
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.config_init = lxt970_config_init,
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.config_init = lxt970_config_init,
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.ack_interrupt = lxt970_ack_interrupt,
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.ack_interrupt = lxt970_ack_interrupt,
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.config_intr = lxt970_config_intr,
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.config_intr = lxt970_config_intr,
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.handle_interrupt = lxt970_handle_interrupt,
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}, {
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}, {
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.phy_id = 0x001378e0,
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.phy_id = 0x001378e0,
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.name = "LXT971",
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.name = "LXT971",
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@@ -246,6 +295,7 @@ static struct phy_driver lxt97x_driver[] = {
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/* PHY_BASIC_FEATURES */
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/* PHY_BASIC_FEATURES */
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.ack_interrupt = lxt971_ack_interrupt,
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.ack_interrupt = lxt971_ack_interrupt,
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.config_intr = lxt971_config_intr,
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.config_intr = lxt971_config_intr,
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.handle_interrupt = lxt971_handle_interrupt,
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.suspend = genphy_suspend,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.resume = genphy_resume,
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}, {
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}, {
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