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ARM: AM335x/AM437x: hwmod: Remove eQEP, ePWM and eCAP hwmod entries

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Devices that utilize the OCP registers and/or PRCM registers and
register bit fields should be modeled using hwmod. Since eQEP, ePWM and
eCAP don't fall under this category, remove their hwmod entries.

Instead these clocks simply use the clock that is passed through by its
parent PWMSS. Therefore, PWMSS handles the clock for itself and its
subdevices.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Franklin S Cooper Jr
2016-06-10 05:02:34 -07:00
committed by Tony Lindgren
parent 078508f85e
commit 015d859193
5 changed files with 0 additions and 229 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
arch/arm/mach-omap2/omap_hwmod_43xx_data.c
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@@ -202,13 +202,6 @@ static struct omap_hwmod am43xx_epwmss3_hwmod = {
},
};
static struct omap_hwmod am43xx_ehrpwm3_hwmod = {
.name = "ehrpwm3",
.class = &am33xx_ehrpwm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
.main_clk = "l4ls_gclk",
};
static struct omap_hwmod am43xx_epwmss4_hwmod = {
.name = "epwmss4",
.class = &am33xx_epwmss_hwmod_class,
@@ -222,13 +215,6 @@ static struct omap_hwmod am43xx_epwmss4_hwmod = {
},
};
static struct omap_hwmod am43xx_ehrpwm4_hwmod = {
.name = "ehrpwm4",
.class = &am33xx_ehrpwm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
.main_clk = "l4ls_gclk",
};
static struct omap_hwmod am43xx_epwmss5_hwmod = {
.name = "epwmss5",
.class = &am33xx_epwmss_hwmod_class,
@@ -242,13 +228,6 @@ static struct omap_hwmod am43xx_epwmss5_hwmod = {
},
};
static struct omap_hwmod am43xx_ehrpwm5_hwmod = {
.name = "ehrpwm5",
.class = &am33xx_ehrpwm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
.main_clk = "l4ls_gclk",
};
static struct omap_hwmod am43xx_spi2_hwmod = {
.name = "spi2",
.class = &am33xx_spi_hwmod_class,
@@ -744,13 +723,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss3 = {
.user = OCP_USER_MPU,
};
static struct omap_hwmod_ocp_if am43xx_epwmss3__ehrpwm3 = {
.master = &am43xx_epwmss3_hwmod,
.slave = &am43xx_ehrpwm3_hwmod,
.clk = "l4ls_gclk",
.user = OCP_USER_MPU,
};
static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am43xx_epwmss4_hwmod,
@@ -758,13 +730,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss4 = {
.user = OCP_USER_MPU,
};
static struct omap_hwmod_ocp_if am43xx_epwmss4__ehrpwm4 = {
.master = &am43xx_epwmss4_hwmod,
.slave = &am43xx_ehrpwm4_hwmod,
.clk = "l4ls_gclk",
.user = OCP_USER_MPU,
};
static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am43xx_epwmss5_hwmod,
@@ -772,13 +737,6 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__epwmss5 = {
.user = OCP_USER_MPU,
};
static struct omap_hwmod_ocp_if am43xx_epwmss5__ehrpwm5 = {
.master = &am43xx_epwmss5_hwmod,
.slave = &am43xx_ehrpwm5_hwmod,
.clk = "l4ls_gclk",
.user = OCP_USER_MPU,
};
static struct omap_hwmod_ocp_if am43xx_l4_ls__mcspi2 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am43xx_spi2_hwmod,
@@ -919,11 +877,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
&am43xx_l4_ls__timer10,
&am43xx_l4_ls__timer11,
&am43xx_l4_ls__epwmss3,
&am43xx_epwmss3__ehrpwm3,
&am43xx_l4_ls__epwmss4,
&am43xx_epwmss4__ehrpwm4,
&am43xx_l4_ls__epwmss5,
&am43xx_epwmss5__ehrpwm5,
&am43xx_l4_ls__mcspi2,
&am43xx_l4_ls__mcspi3,
&am43xx_l4_ls__mcspi4,
@@ -982,17 +937,8 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l4_ls__spinlock,
&am33xx_l4_ls__elm,
&am33xx_l4_ls__epwmss0,
&am33xx_epwmss0__ecap0,
&am33xx_epwmss0__eqep0,
&am33xx_epwmss0__ehrpwm0,
&am33xx_l4_ls__epwmss1,
&am33xx_epwmss1__ecap1,
&am33xx_epwmss1__eqep1,
&am33xx_epwmss1__ehrpwm1,
&am33xx_l4_ls__epwmss2,
&am33xx_epwmss2__ecap2,
&am33xx_epwmss2__eqep2,
&am33xx_epwmss2__ehrpwm2,
&am33xx_l3_s__gpmc,
&am33xx_l4_ls__mcspi0,
&am33xx_l4_ls__mcspi1,