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drm/amdgpu: add sdma ip block for dimgrey_cavefish

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Enable sdma block for dimgrey_cavefish, same as sienna_cichlid.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jiansong Chen <Jiansong.Chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tao Zhou 2020-10-02 11:42:31 -04:00 committed by Alex Deucher
parent feb6329c58
commit 0106922600
2 changed files with 10 additions and 2 deletions
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1
drivers/gpu/drm/amd/amdgpu/nv.c
View File

@ -631,6 +631,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &gmc_v10_0_ip_block);
amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
amdgpu_device_ip_block_add(adev, &sdma_v5_2_ip_block);
break;
default:
return -EINVAL;

11
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
View File

@ -46,6 +46,7 @@
MODULE_FIRMWARE("amdgpu/sienna_cichlid_sdma.bin");
MODULE_FIRMWARE("amdgpu/navy_flounder_sdma.bin");
MODULE_FIRMWARE("amdgpu/dimgrey_cavefish_sdma.bin");
MODULE_FIRMWARE("amdgpu/vangogh_sdma.bin");
@ -90,6 +91,7 @@ static void sdma_v5_2_init_golden_registers(struct amdgpu_device *adev)
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
break;
default:
break;
@ -166,6 +168,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev)
case CHIP_VANGOGH:
chip_name = "vangogh";
break;
case CHIP_DIMGREY_CAVEFISH:
chip_name = "dimgrey_cavefish";
break;
default:
BUG();
}
@ -181,8 +186,8 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev)
goto out;
for (i = 1; i < adev->sdma.num_instances; i++) {
if (adev->asic_type == CHIP_SIENNA_CICHLID ||
adev->asic_type == CHIP_NAVY_FLOUNDER) {
if (adev->asic_type >= CHIP_SIENNA_CICHLID &&
adev->asic_type <= CHIP_DIMGREY_CAVEFISH) {
memcpy((void*)&adev->sdma.instance[i],
(void*)&adev->sdma.instance[0],
sizeof(struct amdgpu_sdma_instance));
@ -1175,6 +1180,7 @@ static int sdma_v5_2_early_init(void *handle)
adev->sdma.num_instances = 4;
break;
case CHIP_NAVY_FLOUNDER:
case CHIP_DIMGREY_CAVEFISH:
adev->sdma.num_instances = 2;
break;
case CHIP_VANGOGH:
@ -1577,6 +1583,7 @@ static int sdma_v5_2_set_clockgating_state(void *handle,
case CHIP_SIENNA_CICHLID:
case CHIP_NAVY_FLOUNDER:
case CHIP_VANGOGH:
case CHIP_DIMGREY_CAVEFISH:
sdma_v5_2_update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE ? true : false);
sdma_v5_2_update_medium_grain_light_sleep(adev,