KVM: x86: Define new #PF SGX error code bit
Page faults that are signaled by the SGX Enclave Page Cache Map (EPCM), as opposed to the traditional IA32/EPT page tables, set an SGX bit in the error code to indicate that the #PF was induced by SGX. KVM will need to emulate this behavior as part of its trap-and-execute scheme for virtualizing SGX Launch Control, e.g. to inject SGX-induced #PFs if EINIT faults in the host, and to support live migration. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Message-Id: <e170c5175cb9f35f53218a7512c9e3db972b97a2.1618196135.git.kai.huang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -236,6 +236,7 @@ enum x86_intercept_stage;
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#define PFERR_RSVD_BIT 3
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#define PFERR_FETCH_BIT 4
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#define PFERR_PK_BIT 5
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#define PFERR_SGX_BIT 15
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#define PFERR_GUEST_FINAL_BIT 32
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#define PFERR_GUEST_PAGE_BIT 33
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@ -245,6 +246,7 @@ enum x86_intercept_stage;
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#define PFERR_RSVD_MASK (1U << PFERR_RSVD_BIT)
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#define PFERR_FETCH_MASK (1U << PFERR_FETCH_BIT)
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#define PFERR_PK_MASK (1U << PFERR_PK_BIT)
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#define PFERR_SGX_MASK (1U << PFERR_SGX_BIT)
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#define PFERR_GUEST_FINAL_MASK (1ULL << PFERR_GUEST_FINAL_BIT)
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#define PFERR_GUEST_PAGE_MASK (1ULL << PFERR_GUEST_PAGE_BIT)
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