forked from Minki/linux
powerpc: define __smp_xxx
This defines __smp_xxx barriers for powerpc for use by virtualization. smp_xxx barriers are removed as they are defined correctly by asm-generic/barriers.h This reduces the amount of arch-specific boiler-plate code. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Boqun Feng <boqun.feng@gmail.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
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@ -44,19 +44,11 @@
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#define dma_rmb() __lwsync()
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#define dma_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
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#ifdef CONFIG_SMP
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#define smp_lwsync() __lwsync()
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#define __smp_lwsync() __lwsync()
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#define smp_mb() mb()
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#define smp_rmb() __lwsync()
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#define smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
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#else
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#define smp_lwsync() barrier()
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#endif /* CONFIG_SMP */
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#define __smp_mb() mb()
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#define __smp_rmb() __lwsync()
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#define __smp_wmb() __asm__ __volatile__ (stringify_in_c(SMPWMB) : : :"memory")
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/*
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* This is a barrier which prevents following instructions from being
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@ -67,18 +59,18 @@
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#define data_barrier(x) \
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asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory");
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#define smp_store_release(p, v) \
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#define __smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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smp_lwsync(); \
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__smp_lwsync(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#define smp_load_acquire(p) \
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#define __smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = READ_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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smp_lwsync(); \
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__smp_lwsync(); \
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___p1; \
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})
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