leandrof/linux
1
0
Fork 0
forked from Minki/linux
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge branch 'drm-fixes-4.15' of git://people.freedesktop.org/~agd5f/linux into drm-fixes

Browse Source 
- backport of a DC change which fixes a greenish tint on some RV hw
- properly handle kzalloc fail in ttm

* 'drm-fixes-4.15' of git://people.freedesktop.org/~agd5f/linux:
  drm/ttm: check the return value of kzalloc
  drm/amd/display: call set csc_default if enable adjustment is false
This commit is contained in:
Dave Airlie 2018-01-05 09:24:26 +10:00
commit 0007b9cad7
5 changed files with 8 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h
View File

@ -1360,7 +1360,7 @@ void dpp1_cm_set_output_csc_adjustment(
void dpp1_cm_set_output_csc_default( void dpp1_cm_set_output_csc_default(
struct dpp *dpp_base, struct dpp *dpp_base,
const struct default_adjustment *default_adjust); enum dc_color_space colorspace);
void dpp1_cm_set_gamut_remap( void dpp1_cm_set_gamut_remap(
struct dpp *dpp, struct dpp *dpp,

6
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
View File

@ -225,14 +225,13 @@ void dpp1_cm_set_gamut_remap(
void dpp1_cm_set_output_csc_default( void dpp1_cm_set_output_csc_default(
struct dpp *dpp_base, struct dpp *dpp_base,
const struct default_adjustment *default_adjust) enum dc_color_space colorspace)
{ {
struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base); struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);
uint32_t ocsc_mode = 0; uint32_t ocsc_mode = 0;
if (default_adjust != NULL) { switch (colorspace) {
switch (default_adjust->out_color_space) {
case COLOR_SPACE_SRGB: case COLOR_SPACE_SRGB:
case COLOR_SPACE_2020_RGB_FULLRANGE: case COLOR_SPACE_2020_RGB_FULLRANGE:
ocsc_mode = 0; ocsc_mode = 0;
@ -253,7 +252,6 @@ void dpp1_cm_set_output_csc_default(
case COLOR_SPACE_UNKNOWN: case COLOR_SPACE_UNKNOWN:
default: default:
break; break;
}
} }
REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode); REG_SET(CM_OCSC_CONTROL, 0, CM_OCSC_MODE, ocsc_mode);

2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -2097,6 +2097,8 @@ static void program_csc_matrix(struct pipe_ctx *pipe_ctx,
tbl_entry.color_space = color_space; tbl_entry.color_space = color_space;
//tbl_entry.regval = matrix; //tbl_entry.regval = matrix;
pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry); pipe_ctx->plane_res.dpp->funcs->opp_set_csc_adjustment(pipe_ctx->plane_res.dpp, &tbl_entry);
} else {
pipe_ctx->plane_res.dpp->funcs->opp_set_csc_default(pipe_ctx->plane_res.dpp, colorspace);
} }
} }
static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) static bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx)

2
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
View File

@ -64,7 +64,7 @@ struct dpp_funcs {
void (*opp_set_csc_default)( void (*opp_set_csc_default)(
struct dpp *dpp, struct dpp *dpp,
const struct default_adjustment *default_adjust); enum dc_color_space colorspace);
void (*opp_set_csc_adjustment)( void (*opp_set_csc_adjustment)(
struct dpp *dpp, struct dpp *dpp,

2
drivers/gpu/drm/ttm/ttm_page_alloc.c
View File

@ -1007,6 +1007,8 @@ int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages)
pr_info("Initializing pool allocator\n"); pr_info("Initializing pool allocator\n");
_manager = kzalloc(sizeof(*_manager), GFP_KERNEL); _manager = kzalloc(sizeof(*_manager), GFP_KERNEL);
if (!_manager)
return -ENOMEM;
ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc", 0); ttm_page_pool_init_locked(&_manager->wc_pool, GFP_HIGHUSER, "wc", 0);