2013-06-10 15:33:31 +00:00
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/*
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* Copyright 2013 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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2013-08-05 17:13:07 +00:00
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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2013-08-05 17:17:15 +00:00
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#include "skeleton.dtsi"
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2013-06-10 15:33:31 +00:00
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/ {
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model = "Texas Instruments Keystone 2 SoC";
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compatible = "ti,keystone-evm";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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};
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memory {
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reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&gic>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <1>;
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};
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cpu@2 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <2>;
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};
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cpu@3 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <3>;
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};
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};
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gic: interrupt-controller {
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compatible = "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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#size-cells = <0>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0x0 0x02561000 0x0 0x1000>,
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<0x0 0x02562000 0x0 0x2000>;
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};
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timer {
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compatible = "arm,armv7-timer";
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2013-08-05 17:13:07 +00:00
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interrupts =
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<GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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2013-06-10 15:33:31 +00:00
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};
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pmu {
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compatible = "arm,cortex-a15-pmu";
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2013-08-05 17:13:07 +00:00
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interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
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<GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
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2013-06-10 15:33:31 +00:00
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ti,keystone","simple-bus";
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interrupt-parent = <&gic>;
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ranges = <0x0 0x0 0x0 0xc0000000>;
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rstctrl: reset-controller {
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compatible = "ti,keystone-reset";
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reg = <0x023100e8 4>; /* pll reset control reg */
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};
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2013-07-09 16:51:51 +00:00
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/include/ "keystone-clocks.dtsi"
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2013-06-10 15:33:31 +00:00
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uart0: serial@02530c00 {
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compatible = "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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reg = <0x02530c00 0x100>;
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2013-07-19 23:11:39 +00:00
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clocks = <&clkuart0>;
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2013-08-05 17:13:07 +00:00
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interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
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2013-06-10 15:33:31 +00:00
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};
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uart1: serial@02531000 {
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compatible = "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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reg = <0x02531000 0x100>;
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2013-07-19 23:11:39 +00:00
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clocks = <&clkuart1>;
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2013-08-05 17:13:07 +00:00
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interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
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2013-06-10 15:33:31 +00:00
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};
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};
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};
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