2008-04-19 00:34:00 +00:00
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/*
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Auvitek AU8522 QAM/8VSB demodulator driver
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Copyright (C) 2008 Steven Toth <stoth@hauppauge.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include "dvb_frontend.h"
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#include "dvb-pll.h"
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#include "au8522.h"
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struct au8522_state {
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2008-04-02 21:59:48 +00:00
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struct i2c_adapter *i2c;
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2008-04-19 00:34:00 +00:00
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/* configuration settings */
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2008-04-02 21:59:48 +00:00
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const struct au8522_config *config;
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2008-04-19 00:34:00 +00:00
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struct dvb_frontend frontend;
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u32 current_frequency;
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fe_modulation_t current_modulation;
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};
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static int debug = 0;
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#define dprintk if (debug) printk
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/* 16 bit registers, 8 bit values */
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2008-04-02 21:59:48 +00:00
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static int au8522_writereg(struct au8522_state *state, u16 reg, u8 data)
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2008-04-19 00:34:00 +00:00
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{
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int ret;
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u8 buf [] = { reg >> 8, reg & 0xff, data };
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struct i2c_msg msg = { .addr = state->config->demod_address,
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.flags = 0, .buf = buf, .len = 3 };
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ret = i2c_transfer(state->i2c, &msg, 1);
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if (ret != 1)
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printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, "
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2008-04-02 21:59:48 +00:00
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"ret == %i)\n", __func__, reg, data, ret);
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2008-04-19 00:34:00 +00:00
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return (ret != 1) ? -1 : 0;
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}
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2008-04-02 21:59:48 +00:00
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static u8 au8522_readreg(struct au8522_state *state, u16 reg)
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2008-04-19 00:34:00 +00:00
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{
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int ret;
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u8 b0 [] = { reg >> 8, reg & 0xff };
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u8 b1 [] = { 0 };
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struct i2c_msg msg [] = {
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{ .addr = state->config->demod_address, .flags = 0,
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.buf = b0, .len = 2 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD,
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.buf = b1, .len = 1 } };
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ret = i2c_transfer(state->i2c, msg, 2);
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if (ret != 2)
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2008-04-02 21:59:48 +00:00
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printk(KERN_ERR "%s: readreg error (ret == %i)\n",
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__func__, ret);
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2008-04-19 00:34:00 +00:00
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return b1[0];
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}
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2008-04-02 21:59:48 +00:00
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static int au8522_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
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2008-04-19 00:34:00 +00:00
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{
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2008-04-02 21:59:48 +00:00
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struct au8522_state *state = fe->demodulator_priv;
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2008-04-19 00:34:00 +00:00
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2008-04-02 21:59:48 +00:00
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dprintk("%s(%d)\n", __func__, enable);
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2008-04-19 00:34:00 +00:00
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if (enable)
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return au8522_writereg(state, 0x106, 1);
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else
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return au8522_writereg(state, 0x106, 0);
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}
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2008-04-02 21:59:48 +00:00
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static int au8522_enable_modulation(struct dvb_frontend *fe,
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fe_modulation_t m)
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2008-04-19 00:34:00 +00:00
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{
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2008-04-02 21:59:48 +00:00
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struct au8522_state *state = fe->demodulator_priv;
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2008-04-19 00:34:00 +00:00
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2008-04-02 21:59:48 +00:00
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dprintk("%s(0x%08x)\n", __func__, m);
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2008-04-19 00:34:00 +00:00
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switch(m) {
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case VSB_8:
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2008-04-02 21:59:48 +00:00
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dprintk("%s() VSB_8\n", __func__);
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2008-04-19 00:34:00 +00:00
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//au8522_writereg(state, 0x410b, 0x84); // Serial
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//au8522_writereg(state, 0x8090, 0x82);
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au8522_writereg(state, 0x8090, 0x84);
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au8522_writereg(state, 0x4092, 0x11);
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au8522_writereg(state, 0x2005, 0x00);
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au8522_writereg(state, 0x8091, 0x80);
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au8522_writereg(state, 0x80a3, 0x0c);
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au8522_writereg(state, 0x80a4, 0xe8);
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au8522_writereg(state, 0x8081, 0xc4);
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au8522_writereg(state, 0x80a5, 0x40);
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au8522_writereg(state, 0x80a7, 0x40);
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au8522_writereg(state, 0x80a6, 0x67);
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au8522_writereg(state, 0x8262, 0x20);
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au8522_writereg(state, 0x821c, 0x30);
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au8522_writereg(state, 0x80d8, 0x1a);
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au8522_writereg(state, 0x8227, 0xa0);
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au8522_writereg(state, 0x8121, 0xff);
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au8522_writereg(state, 0x80a8, 0xf0);
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au8522_writereg(state, 0x80a9, 0x05);
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au8522_writereg(state, 0x80aa, 0x77);
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au8522_writereg(state, 0x80ab, 0xf0);
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au8522_writereg(state, 0x80ac, 0x05);
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au8522_writereg(state, 0x80ad, 0x77);
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au8522_writereg(state, 0x80ae, 0x41);
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au8522_writereg(state, 0x80af, 0x66);
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au8522_writereg(state, 0x821b, 0xcc);
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au8522_writereg(state, 0x821d, 0x80);
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au8522_writereg(state, 0x80b5, 0xfb);
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au8522_writereg(state, 0x80b6, 0x8e);
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au8522_writereg(state, 0x80b7, 0x39);
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au8522_writereg(state, 0x80a4, 0xe8);
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au8522_writereg(state, 0x8231, 0x13);
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break;
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case QAM_64:
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case QAM_256:
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au8522_writereg(state, 0x80a3, 0x09);
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au8522_writereg(state, 0x80a4, 0x00);
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au8522_writereg(state, 0x8081, 0xc4);
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au8522_writereg(state, 0x80a5, 0x40);
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au8522_writereg(state, 0x80b5, 0xfb);
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au8522_writereg(state, 0x80b6, 0x8e);
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au8522_writereg(state, 0x80b7, 0x39);
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au8522_writereg(state, 0x80aa, 0x77);
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au8522_writereg(state, 0x80ad, 0x77);
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au8522_writereg(state, 0x80a6, 0x67);
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au8522_writereg(state, 0x8262, 0x20);
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au8522_writereg(state, 0x821c, 0x30);
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au8522_writereg(state, 0x80b8, 0x3e);
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au8522_writereg(state, 0x80b9, 0xf0);
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au8522_writereg(state, 0x80ba, 0x01);
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au8522_writereg(state, 0x80bb, 0x18);
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au8522_writereg(state, 0x80bc, 0x50);
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au8522_writereg(state, 0x80bd, 0x00);
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au8522_writereg(state, 0x80be, 0xea);
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au8522_writereg(state, 0x80bf, 0xef);
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au8522_writereg(state, 0x80c0, 0xfc);
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au8522_writereg(state, 0x80c1, 0xbd);
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au8522_writereg(state, 0x80c2, 0x1f);
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au8522_writereg(state, 0x80c3, 0xfc);
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au8522_writereg(state, 0x80c4, 0xdd);
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au8522_writereg(state, 0x80c5, 0xaf);
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au8522_writereg(state, 0x80c6, 0x00);
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au8522_writereg(state, 0x80c7, 0x38);
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au8522_writereg(state, 0x80c8, 0x30);
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au8522_writereg(state, 0x80c9, 0x05);
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au8522_writereg(state, 0x80ca, 0x4a);
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au8522_writereg(state, 0x80cb, 0xd0);
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au8522_writereg(state, 0x80cc, 0x01);
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au8522_writereg(state, 0x80cd, 0xd9);
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au8522_writereg(state, 0x80ce, 0x6f);
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au8522_writereg(state, 0x80cf, 0xf9);
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au8522_writereg(state, 0x80d0, 0x70);
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au8522_writereg(state, 0x80d1, 0xdf);
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au8522_writereg(state, 0x80d2, 0xf7);
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au8522_writereg(state, 0x80d3, 0xc2);
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au8522_writereg(state, 0x80d4, 0xdf);
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au8522_writereg(state, 0x80d5, 0x02);
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au8522_writereg(state, 0x80d6, 0x9a);
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au8522_writereg(state, 0x80d7, 0xd0);
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au8522_writereg(state, 0x8250, 0x0d);
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au8522_writereg(state, 0x8251, 0xcd);
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au8522_writereg(state, 0x8252, 0xe0);
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au8522_writereg(state, 0x8253, 0x05);
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au8522_writereg(state, 0x8254, 0xa7);
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au8522_writereg(state, 0x8255, 0xff);
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au8522_writereg(state, 0x8256, 0xed);
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au8522_writereg(state, 0x8257, 0x5b);
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au8522_writereg(state, 0x8258, 0xae);
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au8522_writereg(state, 0x8259, 0xe6);
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au8522_writereg(state, 0x825a, 0x3d);
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au8522_writereg(state, 0x825b, 0x0f);
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au8522_writereg(state, 0x825c, 0x0d);
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au8522_writereg(state, 0x825d, 0xea);
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au8522_writereg(state, 0x825e, 0xf2);
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au8522_writereg(state, 0x825f, 0x51);
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au8522_writereg(state, 0x8260, 0xf5);
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au8522_writereg(state, 0x8261, 0x06);
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au8522_writereg(state, 0x821a, 0x00);
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au8522_writereg(state, 0x8546, 0x40);
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au8522_writereg(state, 0x8210, 0x26);
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au8522_writereg(state, 0x8211, 0xf6);
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au8522_writereg(state, 0x8212, 0x84);
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au8522_writereg(state, 0x8213, 0x02);
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au8522_writereg(state, 0x8502, 0x01);
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au8522_writereg(state, 0x8121, 0x04);
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au8522_writereg(state, 0x8122, 0x04);
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au8522_writereg(state, 0x852e, 0x10);
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au8522_writereg(state, 0x80a4, 0xca);
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au8522_writereg(state, 0x80a7, 0x40);
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au8522_writereg(state, 0x8526, 0x01);
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break;
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default:
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2008-04-02 21:59:48 +00:00
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dprintk("%s() Invalid modulation\n", __func__);
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2008-04-19 00:34:00 +00:00
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return -EINVAL;
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}
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state->current_modulation = m;
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return 0;
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}
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/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
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2008-04-02 21:59:48 +00:00
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static int au8522_set_frontend(struct dvb_frontend *fe,
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struct dvb_frontend_parameters *p)
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2008-04-19 00:34:00 +00:00
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{
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2008-04-02 21:59:48 +00:00
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struct au8522_state *state = fe->demodulator_priv;
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2008-04-19 00:34:00 +00:00
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2008-04-02 21:59:48 +00:00
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dprintk("%s(frequency=%d)\n", __func__, p->frequency);
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2008-04-19 00:34:00 +00:00
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state->current_frequency = p->frequency;
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au8522_enable_modulation(fe, p->u.vsb.modulation);
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/* Allow the demod to settle */
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msleep(100);
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if (fe->ops.tuner_ops.set_params) {
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 1);
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fe->ops.tuner_ops.set_params(fe, p);
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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}
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return 0;
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}
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/* Reset the demod hardware and reset all of the configuration registers
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to a default state. */
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2008-04-02 21:59:48 +00:00
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static int au8522_init(struct dvb_frontend *fe)
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2008-04-19 00:34:00 +00:00
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{
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2008-04-02 21:59:48 +00:00
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struct au8522_state *state = fe->demodulator_priv;
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2008-04-02 21:59:48 +00:00
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dprintk("%s()\n", __func__);
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2008-04-19 00:34:00 +00:00
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au8522_writereg(state, 0xa4, 1 << 5);
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au8522_i2c_gate_ctrl(fe, 1);
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return 0;
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}
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2008-04-02 21:59:48 +00:00
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static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status)
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2008-04-19 00:34:00 +00:00
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{
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2008-04-02 21:59:48 +00:00
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struct au8522_state *state = fe->demodulator_priv;
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2008-04-19 00:34:00 +00:00
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u8 reg;
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u32 tuner_status = 0;
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*status = 0;
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if (state->current_modulation == VSB_8) {
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2008-04-02 21:59:48 +00:00
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dprintk("%s() Checking VSB_8\n", __func__);
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2008-04-19 00:34:00 +00:00
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//au8522_writereg(state, 0x80a4, 0x20);
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reg = au8522_readreg(state, 0x4088);
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2008-04-02 21:59:48 +00:00
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if (reg & 0x01)
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2008-04-19 00:34:00 +00:00
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*status |= FE_HAS_VITERBI;
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2008-04-02 21:59:48 +00:00
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if (reg & 0x02)
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2008-04-19 00:34:00 +00:00
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*status |= FE_HAS_LOCK | FE_HAS_SYNC;
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} else {
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2008-04-02 21:59:48 +00:00
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dprintk("%s() Checking QAM\n", __func__);
|
2008-04-19 00:34:00 +00:00
|
|
|
reg = au8522_readreg(state, 0x4541);
|
2008-04-02 21:59:48 +00:00
|
|
|
if (reg & 0x80)
|
2008-04-19 00:34:00 +00:00
|
|
|
*status |= FE_HAS_VITERBI;
|
2008-04-02 21:59:48 +00:00
|
|
|
if (reg & 0x20)
|
2008-04-19 00:34:00 +00:00
|
|
|
*status |= FE_HAS_LOCK | FE_HAS_SYNC;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch(state->config->status_mode) {
|
|
|
|
case AU8522_DEMODLOCKING:
|
2008-04-02 21:59:48 +00:00
|
|
|
dprintk("%s() DEMODLOCKING\n", __func__);
|
2008-04-19 00:34:00 +00:00
|
|
|
if (*status & FE_HAS_VITERBI)
|
|
|
|
*status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
|
|
|
|
break;
|
|
|
|
case AU8522_TUNERLOCKING:
|
|
|
|
/* Get the tuner status */
|
2008-04-02 21:59:48 +00:00
|
|
|
dprintk("%s() TUNERLOCKING\n", __func__);
|
2008-04-19 00:34:00 +00:00
|
|
|
if (fe->ops.tuner_ops.get_status) {
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 1);
|
|
|
|
|
|
|
|
fe->ops.tuner_ops.get_status(fe, &tuner_status);
|
|
|
|
|
|
|
|
if (fe->ops.i2c_gate_ctrl)
|
|
|
|
fe->ops.i2c_gate_ctrl(fe, 0);
|
|
|
|
}
|
|
|
|
if (tuner_status)
|
|
|
|
*status |= FE_HAS_CARRIER | FE_HAS_SIGNAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
dprintk("%s() status 0x%08x\n", __func__, *status);
|
2008-04-19 00:34:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-06 02:13:05 +00:00
|
|
|
static int au8522_read_mse(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct au8522_state *state = fe->demodulator_priv;
|
|
|
|
int mse = 0;
|
|
|
|
|
|
|
|
if (state->current_modulation == VSB_8)
|
|
|
|
mse = au8522_readreg(state, 0x4311);
|
|
|
|
else
|
|
|
|
mse = au8522_readreg(state, 0x4522);
|
|
|
|
|
|
|
|
dprintk("%s: %d\n", __func__, mse);
|
|
|
|
|
|
|
|
return mse;
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static int au8522_read_snr(struct dvb_frontend *fe, u16 *snr)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
2008-04-02 21:59:48 +00:00
|
|
|
dprintk("%s()\n", __func__);
|
2008-04-19 00:34:00 +00:00
|
|
|
|
2008-04-06 02:13:05 +00:00
|
|
|
/* FIXME: This is mse, not snr
|
|
|
|
* TODO: mse2snr */
|
|
|
|
*snr = au8522_read_mse(fe);
|
2008-04-19 00:34:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static int au8522_read_signal_strength(struct dvb_frontend *fe,
|
|
|
|
u16 *signal_strength)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
|
|
|
return au8522_read_snr(fe, signal_strength);
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static int au8522_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
2008-04-02 21:59:48 +00:00
|
|
|
struct au8522_state *state = fe->demodulator_priv;
|
2008-04-19 00:34:00 +00:00
|
|
|
|
2008-04-06 02:08:08 +00:00
|
|
|
if (state->current_modulation == VSB_8)
|
|
|
|
*ucblocks = au8522_readreg(state, 0x4087);
|
|
|
|
else
|
|
|
|
*ucblocks = au8522_readreg(state, 0x4543);
|
2008-04-19 00:34:00 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static int au8522_read_ber(struct dvb_frontend *fe, u32 *ber)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
|
|
|
return au8522_read_ucblocks(fe, ber);
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static int au8522_get_frontend(struct dvb_frontend *fe,
|
2008-04-19 00:34:00 +00:00
|
|
|
struct dvb_frontend_parameters *p)
|
|
|
|
{
|
2008-04-02 21:59:48 +00:00
|
|
|
struct au8522_state *state = fe->demodulator_priv;
|
2008-04-19 00:34:00 +00:00
|
|
|
|
|
|
|
p->frequency = state->current_frequency;
|
|
|
|
p->u.vsb.modulation = state->current_modulation;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static int au8522_get_tune_settings(struct dvb_frontend *fe,
|
|
|
|
struct dvb_frontend_tune_settings *tune)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
|
|
|
tune->min_delay_ms = 1000;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
static void au8522_release(struct dvb_frontend *fe)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
2008-04-02 21:59:48 +00:00
|
|
|
struct au8522_state *state = fe->demodulator_priv;
|
2008-04-19 00:34:00 +00:00
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dvb_frontend_ops au8522_ops;
|
|
|
|
|
2008-04-02 21:59:48 +00:00
|
|
|
struct dvb_frontend *au8522_attach(const struct au8522_config *config,
|
|
|
|
struct i2c_adapter *i2c)
|
2008-04-19 00:34:00 +00:00
|
|
|
{
|
2008-04-02 21:59:48 +00:00
|
|
|
struct au8522_state *state = NULL;
|
2008-04-19 00:34:00 +00:00
|
|
|
|
|
|
|
/* allocate memory for the internal state */
|
|
|
|
state = kmalloc(sizeof(struct au8522_state), GFP_KERNEL);
|
|
|
|
if (state == NULL)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* setup the state */
|
|
|
|
state->config = config;
|
|
|
|
state->i2c = i2c;
|
|
|
|
/* create dvb_frontend */
|
|
|
|
memcpy(&state->frontend.ops, &au8522_ops,
|
|
|
|
sizeof(struct dvb_frontend_ops));
|
|
|
|
state->frontend.demodulator_priv = state;
|
|
|
|
|
|
|
|
if (au8522_init(&state->frontend) != 0) {
|
|
|
|
printk(KERN_ERR "%s: Failed to initialize correctly\n",
|
2008-04-02 21:59:48 +00:00
|
|
|
__func__);
|
2008-04-19 00:34:00 +00:00
|
|
|
goto error;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Note: Leaving the I2C gate open here. */
|
|
|
|
au8522_i2c_gate_ctrl(&state->frontend, 1);
|
|
|
|
|
|
|
|
return &state->frontend;
|
|
|
|
|
|
|
|
error:
|
|
|
|
kfree(state);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dvb_frontend_ops au8522_ops = {
|
|
|
|
|
|
|
|
.info = {
|
|
|
|
.name = "Auvitek AU8522 QAM/8VSB Frontend",
|
|
|
|
.type = FE_ATSC,
|
|
|
|
.frequency_min = 54000000,
|
|
|
|
.frequency_max = 858000000,
|
|
|
|
.frequency_stepsize = 62500,
|
|
|
|
.caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
|
|
|
|
},
|
|
|
|
|
|
|
|
.init = au8522_init,
|
|
|
|
.i2c_gate_ctrl = au8522_i2c_gate_ctrl,
|
|
|
|
.set_frontend = au8522_set_frontend,
|
|
|
|
.get_frontend = au8522_get_frontend,
|
|
|
|
.get_tune_settings = au8522_get_tune_settings,
|
|
|
|
.read_status = au8522_read_status,
|
|
|
|
.read_ber = au8522_read_ber,
|
|
|
|
.read_signal_strength = au8522_read_signal_strength,
|
|
|
|
.read_snr = au8522_read_snr,
|
|
|
|
.read_ucblocks = au8522_read_ucblocks,
|
|
|
|
.release = au8522_release,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_param(debug, int, 0644);
|
|
|
|
MODULE_PARM_DESC(debug, "Enable verbose debug messages");
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("Auvitek AU8522 QAM-B/ATSC Demodulator driver");
|
|
|
|
MODULE_AUTHOR("Steven Toth");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(au8522_attach);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Local variables:
|
|
|
|
* c-basic-offset: 8
|
|
|
|
*/
|