2013-12-17 01:13:03 +00:00
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/*
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* Copyright 2013 Boundary Devices, Inc.
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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2013-12-18 21:51:44 +00:00
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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2013-12-17 01:13:03 +00:00
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/ {
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2014-05-07 13:19:00 +00:00
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chosen {
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stdout-path = &uart2;
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};
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2013-12-17 01:13:03 +00:00
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memory {
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reg = <0x10000000 0x40000000>;
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_2p5v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "2P5V";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-always-on;
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};
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reg_3p3v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: regulator@2 {
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compatible = "regulator-fixed";
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reg = <2>;
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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2015-06-02 19:07:16 +00:00
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reg_can_xcvr: regulator@3 {
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compatible = "regulator-fixed";
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reg = <3>;
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regulator-name = "CAN XCVR";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can_xcvr>;
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gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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2015-09-30 13:46:39 +00:00
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reg_wlan_vmmc: regulator@4 {
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compatible = "regulator-fixed";
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reg = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wlan_vmmc>;
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regulator-name = "reg_wlan_vmmc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio6 15 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <70000>;
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enable-active-high;
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};
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2013-12-17 01:13:03 +00:00
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};
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2013-12-18 21:51:44 +00:00
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_keys>;
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power {
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label = "Power Button";
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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gpio-key,wakeup;
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};
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menu {
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label = "Menu";
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_MENU>;
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};
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home {
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label = "Home";
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gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_HOME>;
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};
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back {
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label = "Back";
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_BACK>;
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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2013-12-17 01:13:03 +00:00
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sound {
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compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx6q-nitrogen6x-sgtl5000";
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ssi-controller = <&ssi1>;
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audio-codec = <&codec>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <1>;
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mux-ext-port = <3>;
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};
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2015-09-30 13:05:19 +00:00
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backlight_lcd: backlight_lcd {
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2013-12-17 01:13:03 +00:00
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_3p3v>;
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status = "okay";
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};
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2015-05-19 15:50:15 +00:00
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backlight_lvds: backlight_lvds {
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2013-12-17 01:13:03 +00:00
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compatible = "pwm-backlight";
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pwms = <&pwm4 0 5000000>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <7>;
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power-supply = <®_3p3v>;
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status = "okay";
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};
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2015-05-19 15:50:15 +00:00
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2015-09-30 13:05:19 +00:00
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lcd_display: display@di0 {
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compatible = "fsl,imx-parallel-display";
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#address-cells = <1>;
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#size-cells = <0>;
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interface-pix-fmt = "bgr666";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_j15>;
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status = "okay";
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port@0 {
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reg = <0>;
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lcd_display_in: endpoint {
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remote-endpoint = <&ipu1_di0_disp0>;
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};
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};
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port@1 {
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reg = <1>;
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lcd_display_out: endpoint {
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remote-endpoint = <&lcd_panel_in>;
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};
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};
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};
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lcd_panel {
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compatible = "okaya,rs800480t-7x0gp";
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backlight = <&backlight_lcd>;
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port {
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lcd_panel_in: endpoint {
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remote-endpoint = <&lcd_display_out>;
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};
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};
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};
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2015-05-19 15:50:15 +00:00
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panel {
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compatible = "hannstar,hsd100pxn1";
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backlight = <&backlight_lvds>;
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port {
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panel_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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};
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2013-12-17 01:13:03 +00:00
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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2015-06-02 19:07:16 +00:00
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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xceiver-supply = <®_can_xcvr>;
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status = "okay";
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};
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2015-06-29 16:16:54 +00:00
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
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<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
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<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
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};
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2013-12-17 01:13:03 +00:00
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&ecspi1 {
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio3 19 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash: m25p80@0 {
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2015-08-16 06:39:17 +00:00
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compatible = "sst,sst25vf016b", "jedec,spi-nor";
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2013-12-17 01:13:03 +00:00
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio1 27 0>;
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txen-skew-ps = <0>;
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txc-skew-ps = <3000>;
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rxdv-skew-ps = <0>;
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rxc-skew-ps = <3000>;
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rxd0-skew-ps = <0>;
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rxd1-skew-ps = <0>;
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rxd2-skew-ps = <0>;
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rxd3-skew-ps = <0>;
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txd0-skew-ps = <0>;
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txd1-skew-ps = <0>;
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txd2-skew-ps = <0>;
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txd3-skew-ps = <0>;
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ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.
This works around a hardware bug.
From "Chip Errata for the i.MX 6Dual/6Quad"
ERR006687 ENET: Only the ENET wake-up interrupt request can wake the
system from Wait mode.
The ENET block generates many interrupts. Only one of these interrupt lines
is connected to the General Power Controller (GPC) block, but a logical OR
of all of the ENET interrupts is connected to the General Interrupt Controller
(GIC). When the system enters Wait mode, a normal RX Done or TX Done does not
wake up the system because the GPC cannot see this interrupt. This impacts
performance of the ENET block because its interrupts are serviced only when
the chip exits Wait mode due to an interrupt from some other wake-up source.
Before this patch, ping times of a Sabre Lite board are quite
random:
ping 192.168.0.13 -i.5 -c5
PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data.
64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=15.7 ms
64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=14.4 ms
64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=13.4 ms
64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=12.4 ms
64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=11.4 ms
=== 192.168.0.13 ping statistics ===
5 packets transmitted, 5 received, 0% packet loss, time 2004ms
rtt min/avg/max/mdev = 11.431/13.501/15.746/1.508 ms
____________________________________________________
After this patch:
ping 192.168.0.13 -i.5 -c5
PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data.
64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=0.120 ms
64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=0.175 ms
64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=0.169 ms
64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=0.168 ms
64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=0.172 ms
=== 192.168.0.13 ping statistics ===
5 packets transmitted, 5 received, 0% packet loss, time 1999ms
rtt min/avg/max/mdev = 0.120/0.160/0.175/0.026 ms
____________________________________________________
Also, apply same change to imx6qdl-nitrogen6x.
This change may not be appropriate for all boards.
Sabre Lite uses GPIO6 as a power down output for a ov5642
camera. As this expansion board does not yet work with mainline,
this is not yet a conflict. It would be nice to have an alternative
fix for boards where this is a problem.
For example Sabre SD uses GPIO6 for I2C3_SDA. It also
has long ping times currently. But cannot use this fix
without giving up a touchscreen.
Its ping times are also random.
ping 192.168.0.19 -i.5 -c5
PING 192.168.0.19 (192.168.0.19) 56(84) bytes of data.
64 bytes from 192.168.0.19: icmp_req=1 ttl=64 time=16.0 ms
64 bytes from 192.168.0.19: icmp_req=2 ttl=64 time=15.4 ms
64 bytes from 192.168.0.19: icmp_req=3 ttl=64 time=14.4 ms
64 bytes from 192.168.0.19: icmp_req=4 ttl=64 time=13.4 ms
64 bytes from 192.168.0.19: icmp_req=5 ttl=64 time=12.4 ms
=== 192.168.0.19 ping statistics ---
5 packets transmitted, 5 received, 0% packet loss, time 2003ms
rtt min/avg/max/mdev = 12.451/14.369/16.057/1.316 ms
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 18:47:11 +00:00
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interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
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<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
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2013-12-17 01:13:03 +00:00
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status = "okay";
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};
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2014-07-25 10:49:52 +00:00
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&hdmi {
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ddc-i2c-bus = <&i2c2>;
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status = "okay";
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};
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2013-12-17 01:13:03 +00:00
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks 201>;
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VDDA-supply = <®_2p5v>;
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VDDIO-supply = <®_3p3v>;
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};
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2014-08-22 09:13:02 +00:00
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rtc: rtc@6f {
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compatible = "isil,isl1208";
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reg = <0x6f>;
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};
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2013-12-17 01:13:03 +00:00
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};
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2014-07-25 10:49:51 +00:00
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&i2c2 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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2014-07-25 10:49:53 +00:00
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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2015-09-30 13:46:38 +00:00
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touchscreen@04 {
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compatible = "eeti,egalax_ts";
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reg = <0x04>;
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interrupt-parent = <&gpio1>;
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interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
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|
|
wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
|
|
|
|
};
|
|
|
|
|
|
|
|
touchscreen@38 {
|
|
|
|
compatible = "edt,edt-ft5x06";
|
|
|
|
reg = <0x38>;
|
|
|
|
interrupt-parent = <&gpio1>;
|
|
|
|
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
};
|
2014-07-25 10:49:53 +00:00
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
&iomuxc {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
|
|
|
imx6q-nitrogen6x {
|
|
|
|
pinctrl_hog: hoggrp {
|
|
|
|
fsl,pins = <
|
|
|
|
/* SGTL5000 sys_mclk */
|
|
|
|
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0
|
2015-09-30 13:46:38 +00:00
|
|
|
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
|
2013-12-17 01:13:03 +00:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
|
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
|
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2015-06-02 19:07:16 +00:00
|
|
|
pinctrl_can1: can1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
|
|
|
|
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_can_xcvr: can-xcvrgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
/* Flexcan XCVR enable */
|
|
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
|
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
|
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
|
|
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 /* CS */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_enet: enetgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
|
|
|
|
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
|
|
|
|
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
|
|
|
|
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
|
|
|
|
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
|
|
|
|
/* Phy reset */
|
|
|
|
MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x000b0
|
ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC interrupt.
This works around a hardware bug.
From "Chip Errata for the i.MX 6Dual/6Quad"
ERR006687 ENET: Only the ENET wake-up interrupt request can wake the
system from Wait mode.
The ENET block generates many interrupts. Only one of these interrupt lines
is connected to the General Power Controller (GPC) block, but a logical OR
of all of the ENET interrupts is connected to the General Interrupt Controller
(GIC). When the system enters Wait mode, a normal RX Done or TX Done does not
wake up the system because the GPC cannot see this interrupt. This impacts
performance of the ENET block because its interrupts are serviced only when
the chip exits Wait mode due to an interrupt from some other wake-up source.
Before this patch, ping times of a Sabre Lite board are quite
random:
ping 192.168.0.13 -i.5 -c5
PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data.
64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=15.7 ms
64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=14.4 ms
64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=13.4 ms
64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=12.4 ms
64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=11.4 ms
=== 192.168.0.13 ping statistics ===
5 packets transmitted, 5 received, 0% packet loss, time 2004ms
rtt min/avg/max/mdev = 11.431/13.501/15.746/1.508 ms
____________________________________________________
After this patch:
ping 192.168.0.13 -i.5 -c5
PING 192.168.0.13 (192.168.0.13) 56(84) bytes of data.
64 bytes from 192.168.0.13: icmp_req=1 ttl=64 time=0.120 ms
64 bytes from 192.168.0.13: icmp_req=2 ttl=64 time=0.175 ms
64 bytes from 192.168.0.13: icmp_req=3 ttl=64 time=0.169 ms
64 bytes from 192.168.0.13: icmp_req=4 ttl=64 time=0.168 ms
64 bytes from 192.168.0.13: icmp_req=5 ttl=64 time=0.172 ms
=== 192.168.0.13 ping statistics ===
5 packets transmitted, 5 received, 0% packet loss, time 1999ms
rtt min/avg/max/mdev = 0.120/0.160/0.175/0.026 ms
____________________________________________________
Also, apply same change to imx6qdl-nitrogen6x.
This change may not be appropriate for all boards.
Sabre Lite uses GPIO6 as a power down output for a ov5642
camera. As this expansion board does not yet work with mainline,
this is not yet a conflict. It would be nice to have an alternative
fix for boards where this is a problem.
For example Sabre SD uses GPIO6 for I2C3_SDA. It also
has long ping times currently. But cannot use this fix
without giving up a touchscreen.
Its ping times are also random.
ping 192.168.0.19 -i.5 -c5
PING 192.168.0.19 (192.168.0.19) 56(84) bytes of data.
64 bytes from 192.168.0.19: icmp_req=1 ttl=64 time=16.0 ms
64 bytes from 192.168.0.19: icmp_req=2 ttl=64 time=15.4 ms
64 bytes from 192.168.0.19: icmp_req=3 ttl=64 time=14.4 ms
64 bytes from 192.168.0.19: icmp_req=4 ttl=64 time=13.4 ms
64 bytes from 192.168.0.19: icmp_req=5 ttl=64 time=12.4 ms
=== 192.168.0.19 ping statistics ---
5 packets transmitted, 5 received, 0% packet loss, time 2003ms
rtt min/avg/max/mdev = 12.451/14.369/16.057/1.316 ms
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Ranjani Vaidyanathan <ra5478@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-12-20 18:47:11 +00:00
|
|
|
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
|
2013-12-17 01:13:03 +00:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-18 21:51:44 +00:00
|
|
|
pinctrl_gpio_keys: gpio_keysgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
/* Power Button */
|
|
|
|
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
|
|
|
|
/* Menu Button */
|
|
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
|
|
|
|
/* Home Button */
|
|
|
|
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0
|
|
|
|
/* Back Button */
|
|
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
|
|
|
|
/* Volume Up Button */
|
|
|
|
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0
|
|
|
|
/* Volume Down Button */
|
|
|
|
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2014-07-25 10:49:51 +00:00
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2014-07-25 10:49:53 +00:00
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
|
|
|
|
MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2015-09-30 13:05:19 +00:00
|
|
|
pinctrl_j15: j15grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
|
|
|
|
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
|
|
|
|
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
|
|
|
|
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
|
|
|
|
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
pinctrl_pwm1: pwm1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_pwm3: pwm3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_pwm4: pwm4grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
|
|
|
|
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
|
|
|
|
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
|
|
|
|
MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
|
|
|
|
/* power enable, high active */
|
|
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2015-09-30 13:46:39 +00:00
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17071
|
|
|
|
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10071
|
|
|
|
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17071
|
|
|
|
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17071
|
|
|
|
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17071
|
|
|
|
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17071
|
|
|
|
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
|
|
|
|
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usdhc4: usdhc4grp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
|
|
|
|
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
|
|
|
|
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
|
|
|
|
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
|
|
|
|
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
|
|
|
|
>;
|
|
|
|
};
|
2015-09-30 13:46:39 +00:00
|
|
|
|
|
|
|
pinctrl_wlan_vmmc: wlan_vmmcgrp {
|
|
|
|
fsl,pins = <
|
|
|
|
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x100b0
|
|
|
|
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x000b0
|
|
|
|
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x000b0
|
|
|
|
MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x000b0
|
|
|
|
>;
|
|
|
|
};
|
2013-12-17 01:13:03 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2015-09-30 13:05:19 +00:00
|
|
|
&ipu1_di0_disp0 {
|
|
|
|
remote-endpoint = <&lcd_display_in>;
|
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
&ldb {
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
lvds-channel@0 {
|
|
|
|
fsl,data-mapping = "spwg";
|
|
|
|
fsl,data-width = <18>;
|
|
|
|
status = "okay";
|
|
|
|
|
2015-05-19 15:50:15 +00:00
|
|
|
port@4 {
|
|
|
|
reg = <4>;
|
|
|
|
|
|
|
|
lvds0_out: endpoint {
|
|
|
|
remote-endpoint = <&panel_in>;
|
2013-12-17 01:13:03 +00:00
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
&pcie {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pwm1 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pwm3 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_pwm3>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&pwm4 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_pwm4>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&ssi1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart1 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart2 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbh1 {
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbotg {
|
|
|
|
vbus-supply = <®_usb_otg_vbus>;
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
|
|
disable-over-current;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
2015-09-30 13:46:39 +00:00
|
|
|
&usdhc2 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
|
|
bus-width = <4>;
|
|
|
|
non-removable;
|
|
|
|
vmmc-supply = <®_wlan_vmmc>;
|
|
|
|
cap-power-off-card;
|
|
|
|
keep-power-in-suspend;
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
wlcore: wlcore@2 {
|
|
|
|
compatible = "ti,wl1271";
|
|
|
|
reg = <2>;
|
|
|
|
interrupt-parent = <&gpio6>;
|
|
|
|
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
ref-clock-frequency = <38400000>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-12-17 01:13:03 +00:00
|
|
|
&usdhc3 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
2015-07-22 12:53:02 +00:00
|
|
|
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
|
2013-12-17 01:13:03 +00:00
|
|
|
vmmc-supply = <®_3p3v>;
|
|
|
|
status = "okay";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usdhc4 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_usdhc4>;
|
2015-07-22 12:53:02 +00:00
|
|
|
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
|
2013-12-17 01:13:03 +00:00
|
|
|
vmmc-supply = <®_3p3v>;
|
|
|
|
status = "okay";
|
|
|
|
};
|