2012-09-05 19:28:58 +00:00
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/dts-v1/;
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/include/ "skeleton.dtsi"
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/ {
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model = "Qualcomm MSM8960 CDP";
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compatible = "qcom,msm8960-cdp", "qcom,msm8960";
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interrupt-parent = <&intc>;
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intc: interrupt-controller@2000000 {
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compatible = "qcom,msm-qgic2";
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interrupt-controller;
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#interrupt-cells = <3>;
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reg = < 0x02000000 0x1000 >,
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< 0x02002000 0x1000 >;
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};
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2013-03-15 03:31:38 +00:00
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timer@200a000 {
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compatible = "qcom,kpss-timer", "qcom,msm-timer";
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interrupts = <1 1 0x301>,
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<1 2 0x301>,
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<1 3 0x301>;
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reg = <0x0200a000 0x100>;
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clock-frequency = <27000000>,
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<32768>;
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2012-09-05 19:28:58 +00:00
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cpu-offset = <0x80000>;
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};
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serial@19c400000 {
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compatible = "qcom,msm-hsuart", "qcom,msm-uart";
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reg = <0x16440000 0x1000>,
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<0x16400000 0x1000>;
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interrupts = <0 154 0x0>;
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};
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2013-03-12 18:41:50 +00:00
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qcom,ssbi@500000 {
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compatible = "qcom,ssbi";
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reg = <0x500000 0x1000>;
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qcom,controller-type = "pmic-arbiter";
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};
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2012-09-05 19:28:58 +00:00
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};
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