forked from Minki/linux
400 lines
8.1 KiB
C
400 lines
8.1 KiB
C
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/*
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* linux/drivers/video/omap2/dss/dpi.c
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*
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* Copyright (C) 2009 Nokia Corporation
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* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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*
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* Some code and ideas taken from drivers/video/omap/ driver
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* by Imre Deak.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define DSS_SUBSYS_NAME "DPI"
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <plat/display.h>
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#include <plat/cpu.h>
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#include "dss.h"
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static struct {
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int update_enabled;
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} dpi;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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static int dpi_set_dsi_clk(bool is_tft, unsigned long pck_req,
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unsigned long *fck, int *lck_div, int *pck_div)
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{
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struct dsi_clock_info dsi_cinfo;
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struct dispc_clock_info dispc_cinfo;
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int r;
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r = dsi_pll_calc_clock_div_pck(is_tft, pck_req, &dsi_cinfo,
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&dispc_cinfo);
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if (r)
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return r;
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r = dsi_pll_set_clock_div(&dsi_cinfo);
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if (r)
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return r;
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dss_select_clk_source(0, 1);
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r = dispc_set_clock_div(&dispc_cinfo);
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if (r)
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return r;
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*fck = dsi_cinfo.dsi1_pll_fclk;
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*lck_div = dispc_cinfo.lck_div;
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*pck_div = dispc_cinfo.pck_div;
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return 0;
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}
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#else
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static int dpi_set_dispc_clk(bool is_tft, unsigned long pck_req,
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unsigned long *fck, int *lck_div, int *pck_div)
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{
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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int r;
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r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
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if (r)
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return r;
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r = dss_set_clock_div(&dss_cinfo);
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if (r)
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return r;
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r = dispc_set_clock_div(&dispc_cinfo);
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if (r)
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return r;
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*fck = dss_cinfo.fck;
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*lck_div = dispc_cinfo.lck_div;
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*pck_div = dispc_cinfo.pck_div;
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return 0;
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}
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#endif
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static int dpi_set_mode(struct omap_dss_device *dssdev)
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{
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struct omap_video_timings *t = &dssdev->panel.timings;
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int lck_div, pck_div;
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unsigned long fck;
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unsigned long pck;
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bool is_tft;
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int r = 0;
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
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dispc_set_pol_freq(dssdev->panel.config, dssdev->panel.acbi,
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dssdev->panel.acb);
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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r = dpi_set_dsi_clk(is_tft, t->pixel_clock * 1000,
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&fck, &lck_div, &pck_div);
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#else
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r = dpi_set_dispc_clk(is_tft, t->pixel_clock * 1000,
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&fck, &lck_div, &pck_div);
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#endif
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if (r)
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goto err0;
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pck = fck / lck_div / pck_div / 1000;
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if (pck != t->pixel_clock) {
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DSSWARN("Could not find exact pixel clock. "
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"Requested %d kHz, got %lu kHz\n",
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t->pixel_clock, pck);
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t->pixel_clock = pck;
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}
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dispc_set_lcd_timings(t);
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err0:
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
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return r;
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}
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static int dpi_basic_init(struct omap_dss_device *dssdev)
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{
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bool is_tft;
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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dispc_set_parallel_interface_mode(OMAP_DSS_PARALLELMODE_BYPASS);
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dispc_set_lcd_display_type(is_tft ? OMAP_DSS_LCD_DISPLAY_TFT :
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OMAP_DSS_LCD_DISPLAY_STN);
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dispc_set_tft_data_lines(dssdev->phy.dpi.data_lines);
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return 0;
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}
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static int dpi_display_enable(struct omap_dss_device *dssdev)
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{
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int r;
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r = omap_dss_start_device(dssdev);
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if (r) {
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DSSERR("failed to start device\n");
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goto err0;
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}
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if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) {
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DSSERR("display already enabled\n");
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r = -EINVAL;
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goto err1;
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}
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
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r = dpi_basic_init(dssdev);
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if (r)
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goto err2;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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dss_clk_enable(DSS_CLK_FCK2);
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r = dsi_pll_init(dssdev, 0, 1);
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if (r)
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goto err3;
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#endif
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r = dpi_set_mode(dssdev);
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if (r)
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goto err4;
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mdelay(2);
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dispc_enable_lcd_out(1);
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r = dssdev->driver->enable(dssdev);
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if (r)
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goto err5;
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dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
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return 0;
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err5:
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dispc_enable_lcd_out(0);
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err4:
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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dsi_pll_uninit();
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err3:
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dss_clk_disable(DSS_CLK_FCK2);
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#endif
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err2:
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
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err1:
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omap_dss_stop_device(dssdev);
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err0:
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return r;
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}
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static int dpi_display_resume(struct omap_dss_device *dssdev);
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static void dpi_display_disable(struct omap_dss_device *dssdev)
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{
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if (dssdev->state == OMAP_DSS_DISPLAY_DISABLED)
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return;
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if (dssdev->state == OMAP_DSS_DISPLAY_SUSPENDED)
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dpi_display_resume(dssdev);
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dssdev->driver->disable(dssdev);
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dispc_enable_lcd_out(0);
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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dss_select_clk_source(0, 0);
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dsi_pll_uninit();
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dss_clk_disable(DSS_CLK_FCK2);
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#endif
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
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dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
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omap_dss_stop_device(dssdev);
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}
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static int dpi_display_suspend(struct omap_dss_device *dssdev)
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{
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if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
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return -EINVAL;
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DSSDBG("dpi_display_suspend\n");
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if (dssdev->driver->suspend)
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dssdev->driver->suspend(dssdev);
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dispc_enable_lcd_out(0);
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dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
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dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
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return 0;
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}
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static int dpi_display_resume(struct omap_dss_device *dssdev)
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{
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if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED)
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return -EINVAL;
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DSSDBG("dpi_display_resume\n");
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dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
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dispc_enable_lcd_out(1);
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if (dssdev->driver->resume)
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dssdev->driver->resume(dssdev);
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dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
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return 0;
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}
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static void dpi_set_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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DSSDBG("dpi_set_timings\n");
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dssdev->panel.timings = *timings;
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if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
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dpi_set_mode(dssdev);
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dispc_go(OMAP_DSS_CHANNEL_LCD);
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}
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}
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static int dpi_check_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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bool is_tft;
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int r;
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int lck_div, pck_div;
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unsigned long fck;
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unsigned long pck;
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if (!dispc_lcd_timings_ok(timings))
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return -EINVAL;
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if (timings->pixel_clock == 0)
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return -EINVAL;
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is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
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#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
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{
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struct dsi_clock_info dsi_cinfo;
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struct dispc_clock_info dispc_cinfo;
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r = dsi_pll_calc_clock_div_pck(is_tft,
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timings->pixel_clock * 1000,
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&dsi_cinfo, &dispc_cinfo);
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if (r)
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return r;
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fck = dsi_cinfo.dsi1_pll_fclk;
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lck_div = dispc_cinfo.lck_div;
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pck_div = dispc_cinfo.pck_div;
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}
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#else
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{
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struct dss_clock_info dss_cinfo;
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struct dispc_clock_info dispc_cinfo;
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r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
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&dss_cinfo, &dispc_cinfo);
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if (r)
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return r;
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fck = dss_cinfo.fck;
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lck_div = dispc_cinfo.lck_div;
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pck_div = dispc_cinfo.pck_div;
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}
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#endif
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pck = fck / lck_div / pck_div / 1000;
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timings->pixel_clock = pck;
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return 0;
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}
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static void dpi_get_timings(struct omap_dss_device *dssdev,
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struct omap_video_timings *timings)
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{
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*timings = dssdev->panel.timings;
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}
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static int dpi_display_set_update_mode(struct omap_dss_device *dssdev,
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enum omap_dss_update_mode mode)
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{
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if (mode == OMAP_DSS_UPDATE_MANUAL)
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return -EINVAL;
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if (mode == OMAP_DSS_UPDATE_DISABLED) {
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dispc_enable_lcd_out(0);
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dpi.update_enabled = 0;
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} else {
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dispc_enable_lcd_out(1);
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dpi.update_enabled = 1;
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}
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return 0;
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}
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static enum omap_dss_update_mode dpi_display_get_update_mode(
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struct omap_dss_device *dssdev)
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{
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return dpi.update_enabled ? OMAP_DSS_UPDATE_AUTO :
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OMAP_DSS_UPDATE_DISABLED;
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}
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int dpi_init_display(struct omap_dss_device *dssdev)
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{
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DSSDBG("init_display\n");
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dssdev->enable = dpi_display_enable;
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dssdev->disable = dpi_display_disable;
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dssdev->suspend = dpi_display_suspend;
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dssdev->resume = dpi_display_resume;
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dssdev->set_timings = dpi_set_timings;
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dssdev->check_timings = dpi_check_timings;
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dssdev->get_timings = dpi_get_timings;
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dssdev->set_update_mode = dpi_display_set_update_mode;
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dssdev->get_update_mode = dpi_display_get_update_mode;
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return 0;
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}
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int dpi_init(void)
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{
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return 0;
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}
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void dpi_exit(void)
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{
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}
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