2008-07-29 10:42:31 +00:00
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/*
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* Texas Instruments TLV320AIC26 low power audio CODEC
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* ALSA SoC CODEC driver
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*
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* Copyright (C) 2008 Secret Lab Technologies Ltd.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/device.h>
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#include <linux/sysfs.h>
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#include <linux/spi/spi.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 08:04:11 +00:00
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#include <linux/slab.h>
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2008-07-29 10:42:31 +00:00
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include "tlv320aic26.h"
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MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
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MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
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MODULE_LICENSE("GPL");
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/* AIC26 driver private data */
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struct aic26 {
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struct spi_device *spi;
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struct snd_soc_codec codec;
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int master;
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int datfm;
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int mclk;
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/* Keyclick parameters */
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int keyclick_amplitude;
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int keyclick_freq;
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int keyclick_len;
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};
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/* ---------------------------------------------------------------------
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* Register access routines
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*/
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static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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2010-04-20 06:20:31 +00:00
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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2008-07-29 10:42:31 +00:00
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u16 *cache = codec->reg_cache;
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u16 cmd, value;
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u8 buffer[2];
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int rc;
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if (reg >= AIC26_NUM_REGS) {
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WARN_ON_ONCE(1);
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return 0;
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}
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/* Do SPI transfer; first 16bits are command; remaining is
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* register contents */
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cmd = AIC26_READ_COMMAND_WORD(reg);
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buffer[0] = (cmd >> 8) & 0xff;
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buffer[1] = cmd & 0xff;
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rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
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if (rc) {
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dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
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return -EIO;
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}
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value = (buffer[0] << 8) | buffer[1];
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/* Update the cache before returning with the value */
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cache[reg] = value;
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return value;
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}
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static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *cache = codec->reg_cache;
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if (reg >= AIC26_NUM_REGS) {
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WARN_ON_ONCE(1);
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return 0;
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}
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return cache[reg];
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}
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static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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2010-04-20 06:20:31 +00:00
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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2008-07-29 10:42:31 +00:00
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u16 *cache = codec->reg_cache;
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u16 cmd;
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u8 buffer[4];
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int rc;
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if (reg >= AIC26_NUM_REGS) {
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WARN_ON_ONCE(1);
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return -EINVAL;
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}
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/* Do SPI transfer; first 16bits are command; remaining is data
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* to write into register */
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cmd = AIC26_WRITE_COMMAND_WORD(reg);
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buffer[0] = (cmd >> 8) & 0xff;
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buffer[1] = cmd & 0xff;
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buffer[2] = value >> 8;
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buffer[3] = value;
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rc = spi_write(aic26->spi, buffer, 4);
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if (rc) {
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dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
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return -EIO;
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}
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/* update cache before returning */
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cache[reg] = value;
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return 0;
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}
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/* ---------------------------------------------------------------------
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* Digital Audio Interface Operations
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*/
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static int aic26_hw_params(struct snd_pcm_substream *substream,
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2008-11-18 22:11:38 +00:00
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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2008-07-29 10:42:31 +00:00
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{
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2012-04-04 14:58:16 +00:00
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struct snd_soc_codec *codec = dai->codec;
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2010-04-20 06:20:31 +00:00
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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2008-07-29 10:42:31 +00:00
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int fsref, divisor, wlen, pval, jval, dval, qval;
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u16 reg;
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dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
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substream, params);
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dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
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params_format(params));
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switch (params_rate(params)) {
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case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
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case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
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case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
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case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
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case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
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case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
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case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
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case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
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case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
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}
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/* select data word length */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
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case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
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case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
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case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
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}
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2011-05-20 14:26:06 +00:00
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/**
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* Configure PLL
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* fsref = (mclk * PLLM) / 2048
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* where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
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*/
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2008-07-29 10:42:31 +00:00
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pval = 1;
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2011-05-20 14:26:06 +00:00
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/* compute J portion of multiplier */
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jval = fsref / (aic26->mclk / 2048);
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/* compute fractional DDDD component of multiplier */
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dval = fsref - (jval * (aic26->mclk / 2048));
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dval = (10000 * dval) / (aic26->mclk / 2048);
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dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
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2008-07-29 10:42:31 +00:00
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qval = 0;
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reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
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aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
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reg = dval << 2;
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aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
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/* Audio Control 3 (master mode, fsref rate) */
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reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
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reg &= ~0xf800;
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if (aic26->master)
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reg |= 0x0800;
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if (fsref == 48000)
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reg |= 0x2000;
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aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
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/* Audio Control 1 (FSref divisor) */
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reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
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reg &= ~0x0fff;
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reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
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aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
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return 0;
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}
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/**
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* aic26_mute - Mute control to reduce noise when changing audio format
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*/
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static int aic26_mute(struct snd_soc_dai *dai, int mute)
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{
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struct snd_soc_codec *codec = dai->codec;
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2010-04-20 06:20:31 +00:00
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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2008-07-29 10:42:31 +00:00
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u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
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dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
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dai, mute);
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if (mute)
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reg |= 0x8080;
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else
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reg &= ~0x8080;
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aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
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return 0;
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}
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static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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2010-04-20 06:20:31 +00:00
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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2008-07-29 10:42:31 +00:00
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dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
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" freq=%i, dir=%i)\n",
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codec_dai, clk_id, freq, dir);
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/* MCLK needs to fall between 2MHz and 50 MHz */
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if ((freq < 2000000) || (freq > 50000000))
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return -EINVAL;
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aic26->mclk = freq;
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return 0;
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}
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static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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2010-04-20 06:20:31 +00:00
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struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
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2008-07-29 10:42:31 +00:00
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dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
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codec_dai, fmt);
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/* set master/slave audio interface */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
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case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
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}
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/* interface format */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
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case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
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case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
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case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
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default:
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dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
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}
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return 0;
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}
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/* ---------------------------------------------------------------------
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* Digital Audio Interface Definition
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*/
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#define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
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SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
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SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
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SNDRV_PCM_RATE_48000)
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#define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
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SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
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2011-11-23 10:40:40 +00:00
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static const struct snd_soc_dai_ops aic26_dai_ops = {
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2009-03-03 01:41:00 +00:00
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.hw_params = aic26_hw_params,
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.digital_mute = aic26_mute,
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.set_sysclk = aic26_set_sysclk,
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.set_fmt = aic26_set_fmt,
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};
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2010-03-17 20:15:21 +00:00
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static struct snd_soc_dai_driver aic26_dai = {
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.name = "tlv320aic26-hifi",
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2008-07-29 10:42:31 +00:00
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.playback = {
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.stream_name = "Playback",
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.channels_min = 2,
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.channels_max = 2,
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.rates = AIC26_RATES,
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.formats = AIC26_FORMATS,
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},
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = AIC26_RATES,
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.formats = AIC26_FORMATS,
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},
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2009-03-03 01:41:00 +00:00
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.ops = &aic26_dai_ops,
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2008-07-29 10:42:31 +00:00
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};
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/* ---------------------------------------------------------------------
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* ALSA controls
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*/
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static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
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static const struct soc_enum aic26_capture_src_enum =
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SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
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static const struct snd_kcontrol_new aic26_snd_controls[] = {
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/* Output */
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SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
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SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
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SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
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SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
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SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
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SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
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SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
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SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
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SOC_ENUM("Capture Source", aic26_capture_src_enum),
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};
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/* ---------------------------------------------------------------------
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* SPI device portion of driver: sysfs files for debugging
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*/
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static ssize_t aic26_keyclick_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct aic26 *aic26 = dev_get_drvdata(dev);
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int val, amp, freq, len;
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val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
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amp = (val >> 12) & 0x7;
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freq = (125 << ((val >> 8) & 0x7)) >> 1;
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len = 2 * (1 + ((val >> 4) & 0xf));
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return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
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}
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/* Any write to the keyclick attribute will trigger the keyclick event */
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static ssize_t aic26_keyclick_set(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct aic26 *aic26 = dev_get_drvdata(dev);
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int val;
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val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
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val |= 0x8000;
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aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
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return count;
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}
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2008-07-29 10:42:33 +00:00
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static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
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2008-07-29 10:42:31 +00:00
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/* ---------------------------------------------------------------------
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2010-03-17 20:15:21 +00:00
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* SoC CODEC portion of driver: probe and release routines
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2008-07-29 10:42:31 +00:00
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*/
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2010-03-17 20:15:21 +00:00
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static int aic26_probe(struct snd_soc_codec *codec)
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2008-07-29 10:42:31 +00:00
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{
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2010-03-17 20:15:21 +00:00
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int ret, err, i, reg;
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2008-07-29 10:42:31 +00:00
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2010-03-17 20:15:21 +00:00
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dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
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2008-12-08 19:17:58 +00:00
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2008-07-29 10:42:31 +00:00
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/* Reset the codec to power on defaults */
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2010-03-17 20:15:21 +00:00
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aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
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2008-07-29 10:42:31 +00:00
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/* Power up CODEC */
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2010-03-17 20:15:21 +00:00
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aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
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2008-07-29 10:42:31 +00:00
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/* Audio Control 3 (master mode, fsref rate) */
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2010-03-17 20:15:21 +00:00
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reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
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2008-07-29 10:42:31 +00:00
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reg &= ~0xf800;
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reg |= 0x0800; /* set master mode */
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2010-03-17 20:15:21 +00:00
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aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
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2008-07-29 10:42:31 +00:00
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/* Fill register cache */
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2010-12-28 20:37:55 +00:00
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for (i = 0; i < codec->driver->reg_cache_size; i++)
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2010-03-17 20:15:21 +00:00
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aic26_reg_read(codec, i);
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2008-07-29 10:42:31 +00:00
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/* Register the sysfs files for debugging */
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/* Create SysFS files */
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2010-03-17 20:15:21 +00:00
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ret = device_create_file(codec->dev, &dev_attr_keyclick);
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2008-12-08 19:17:58 +00:00
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if (ret)
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2010-03-17 20:15:21 +00:00
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dev_info(codec->dev, "error creating sysfs files\n");
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2008-07-29 10:42:31 +00:00
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2010-03-17 20:15:21 +00:00
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/* register controls */
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dev_dbg(codec->dev, "Registering controls\n");
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2012-02-03 17:43:09 +00:00
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err = snd_soc_add_codec_controls(codec, aic26_snd_controls,
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2010-03-17 20:15:21 +00:00
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ARRAY_SIZE(aic26_snd_controls));
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WARN_ON(err < 0);
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2008-07-29 10:42:31 +00:00
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return 0;
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}
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2010-03-17 20:15:21 +00:00
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static struct snd_soc_codec_driver aic26_soc_codec_dev = {
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.probe = aic26_probe,
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.read = aic26_reg_read,
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.write = aic26_reg_write,
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.reg_cache_size = AIC26_NUM_REGS,
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.reg_word_size = sizeof(u16),
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};
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/* ---------------------------------------------------------------------
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* SPI device portion of driver: probe and release routines and SPI
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* driver registration.
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*/
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static int aic26_spi_probe(struct spi_device *spi)
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2008-07-29 10:42:31 +00:00
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{
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2010-03-17 20:15:21 +00:00
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struct aic26 *aic26;
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int ret;
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2008-07-29 10:42:31 +00:00
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2010-03-17 20:15:21 +00:00
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dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
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/* Allocate driver data */
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2011-12-29 04:08:36 +00:00
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aic26 = devm_kzalloc(&spi->dev, sizeof *aic26, GFP_KERNEL);
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2010-03-17 20:15:21 +00:00
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if (!aic26)
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return -ENOMEM;
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2008-07-29 10:42:31 +00:00
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2010-03-17 20:15:21 +00:00
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/* Initialize the driver data */
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aic26->spi = spi;
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dev_set_drvdata(&spi->dev, aic26);
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aic26->master = 1;
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ret = snd_soc_register_codec(&spi->dev,
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&aic26_soc_codec_dev, &aic26_dai, 1);
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return ret;
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}
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static int aic26_spi_remove(struct spi_device *spi)
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{
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snd_soc_unregister_codec(&spi->dev);
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2008-07-29 10:42:31 +00:00
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return 0;
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}
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static struct spi_driver aic26_spi = {
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.driver = {
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2010-03-17 20:15:21 +00:00
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.name = "tlv320aic26-codec",
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2008-07-29 10:42:31 +00:00
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.owner = THIS_MODULE,
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},
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.probe = aic26_spi_probe,
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.remove = aic26_spi_remove,
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};
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2012-08-27 11:30:26 +00:00
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module_spi_driver(aic26_spi);
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