2011-07-19 23:26:54 +00:00
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/dts-v1/;
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/include/ "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra2 Harmony evaluation board";
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compatible = "nvidia,harmony", "nvidia,tegra20";
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2012-05-11 22:17:47 +00:00
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memory {
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2012-05-11 22:11:38 +00:00
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reg = <0x00000000 0x40000000>;
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2011-07-19 23:26:54 +00:00
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};
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2012-05-11 22:17:47 +00:00
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pinmux {
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2012-03-15 22:27:36 +00:00
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata";
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nvidia,function = "ide";
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};
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atb {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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};
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atc {
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nvidia,pins = "atc";
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nvidia,function = "nand";
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};
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atd {
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nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
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"spia", "spib", "spic";
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nvidia,function = "gmi";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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};
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crtp {
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nvidia,pins = "crtp";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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};
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dta {
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nvidia,pins = "dta", "dtd";
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nvidia,function = "sdio2";
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};
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dtb {
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nvidia,pins = "dtb", "dtc", "dte";
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nvidia,function = "rsvd1";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gmc {
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nvidia,pins = "gmc";
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nvidia,function = "uartd";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv", "slxa", "slxk";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint", "pta";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uarta";
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};
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kbca {
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nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
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"kbce", "kbcf";
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nvidia,function = "kbc";
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};
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lcsn {
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nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
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"ld3", "ld4", "ld5", "ld6", "ld7",
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"ld8", "ld9", "ld10", "ld11", "ld12",
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"ld13", "ld14", "ld15", "ld16", "ld17",
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"ldc", "ldi", "lhp0", "lhp1", "lhp2",
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"lhs", "lm0", "lm1", "lpp", "lpw0",
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"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
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"lsda", "lsdi", "lspi", "lvp0", "lvp1",
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"lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc", "spdi", "spdo", "uac";
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nvidia,function = "rsvd2";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd";
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nvidia,function = "pwm";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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slxc {
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nvidia,pins = "slxc", "slxd";
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nvidia,function = "spdif";
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};
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spid {
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nvidia,pins = "spid", "spie", "spif";
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nvidia,function = "spi1";
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};
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spig {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uaa {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "atd", "ate",
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2012-04-13 22:35:20 +00:00
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"cdev1", "cdev2", "dap1", "dtb", "gma",
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"gmb", "gmc", "gmd", "gme", "gpu7",
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"gpv", "i2cp", "pta", "rm", "slxa",
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"slxk", "spia", "spib", "uac";
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2012-03-15 22:27:36 +00:00
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nvidia,pull = <0>;
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nvidia,tristate = <0>;
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};
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conf_ck32 {
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nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
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nvidia,pull = <0>;
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};
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2012-04-13 22:35:20 +00:00
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conf_csus {
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nvidia,pins = "csus", "spid", "spif";
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nvidia,pull = <1>;
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nvidia,tristate = <1>;
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};
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2012-03-15 22:27:36 +00:00
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conf_crtp {
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nvidia,pins = "crtp", "dap2", "dap3", "dap4",
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"dtc", "dte", "dtf", "gpu", "sdio1",
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"slxc", "slxd", "spdi", "spdo", "spig",
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2012-04-13 22:35:20 +00:00
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"uda";
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2012-03-15 22:27:36 +00:00
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nvidia,pull = <0>;
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nvidia,tristate = <1>;
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};
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conf_ddc {
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nvidia,pins = "ddc", "dta", "dtd", "kbca",
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"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
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"sdc";
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nvidia,pull = <2>;
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nvidia,tristate = <0>;
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};
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conf_hdint {
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nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
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"lpw1", "lsc1", "lsck", "lsda", "lsdi",
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"lvp0", "owc", "sdb";
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nvidia,tristate = <1>;
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};
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conf_irrx {
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nvidia,pins = "irrx", "irtx", "sdd", "spic",
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"spie", "spih", "uaa", "uab", "uad",
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"uca", "ucb";
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nvidia,pull = <2>;
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nvidia,tristate = <1>;
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};
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conf_lc {
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nvidia,pins = "lc", "ls";
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nvidia,pull = <2>;
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};
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conf_ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldi", "lhp0",
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"lhp1", "lhp2", "lhs", "lm0", "lpp",
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"lpw0", "lpw2", "lsc0", "lspi", "lvp1",
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"lvs", "pmc";
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nvidia,tristate = <0>;
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};
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conf_ld17_0 {
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nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
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"ld23_22";
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nvidia,pull = <1>;
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};
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};
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};
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|
2012-05-11 23:32:56 +00:00
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i2s@70002800 {
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status = "okay";
|
2012-05-11 23:03:26 +00:00
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};
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serial@70006300 {
|
2012-05-11 23:32:56 +00:00
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status = "okay";
|
2012-05-11 23:03:26 +00:00
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clock-frequency = <216000000>;
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};
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|
2011-07-19 23:26:54 +00:00
|
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|
i2c@7000c000 {
|
2012-05-11 23:32:56 +00:00
|
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status = "okay";
|
2011-07-19 23:26:54 +00:00
|
|
|
clock-frequency = <400000>;
|
|
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|
|
2012-01-11 23:09:57 +00:00
|
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wm8903: wm8903@1a {
|
2011-07-19 23:26:54 +00:00
|
|
|
compatible = "wlf,wm8903";
|
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reg = <0x1a>;
|
2012-01-11 23:09:57 +00:00
|
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interrupt-parent = <&gpio>;
|
2012-05-11 22:11:38 +00:00
|
|
|
interrupts = <187 0x04>;
|
2011-07-19 23:26:54 +00:00
|
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gpio-controller;
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|
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#gpio-cells = <2>;
|
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|
|
2012-01-11 23:09:57 +00:00
|
|
|
micdet-cfg = <0>;
|
|
|
|
|
micdet-delay = <100>;
|
2012-05-11 22:11:38 +00:00
|
|
|
gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
|
2011-07-19 23:26:54 +00:00
|
|
|
};
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|
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};
|
|
|
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|
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|
|
|
i2c@7000c400 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2011-07-19 23:26:54 +00:00
|
|
|
clock-frequency = <400000>;
|
|
|
|
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};
|
|
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|
|
|
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|
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i2c@7000c500 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2011-07-19 23:26:54 +00:00
|
|
|
clock-frequency = <400000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000d000 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2011-07-19 23:26:54 +00:00
|
|
|
clock-frequency = <400000>;
|
ARM: dt: tegra: harmony: add regulators
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-16 20:59:59 +00:00
|
|
|
|
|
|
|
|
pmic: tps6586x@34 {
|
|
|
|
|
compatible = "ti,tps6586x";
|
|
|
|
|
reg = <0x34>;
|
|
|
|
|
interrupts = <0 86 0x4>;
|
|
|
|
|
|
2012-09-11 17:40:04 +00:00
|
|
|
ti,system-power-controller;
|
|
|
|
|
|
ARM: dt: tegra: harmony: add regulators
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-16 20:59:59 +00:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
|
|
|
|
|
sys-supply = <&vdd_5v0_reg>;
|
|
|
|
|
vin-sm0-supply = <&sys_reg>;
|
|
|
|
|
vin-sm1-supply = <&sys_reg>;
|
|
|
|
|
vin-sm2-supply = <&sys_reg>;
|
|
|
|
|
vinldo01-supply = <&sm2_reg>;
|
|
|
|
|
vinldo23-supply = <&sm2_reg>;
|
|
|
|
|
vinldo4-supply = <&sm2_reg>;
|
|
|
|
|
vinldo678-supply = <&sm2_reg>;
|
|
|
|
|
vinldo9-supply = <&sm2_reg>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
sys_reg: regulator@0 {
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-compatible = "sys";
|
|
|
|
|
regulator-name = "vdd_sys";
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@1 {
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-compatible = "sm0";
|
|
|
|
|
regulator-name = "vdd_sm0,vdd_core";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@2 {
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-compatible = "sm1";
|
|
|
|
|
regulator-name = "vdd_sm1,vdd_cpu";
|
|
|
|
|
regulator-min-microvolt = <1000000>;
|
|
|
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sm2_reg: regulator@3 {
|
|
|
|
|
reg = <3>;
|
|
|
|
|
regulator-compatible = "sm2";
|
|
|
|
|
regulator-name = "vdd_sm2,vin_ldo*";
|
|
|
|
|
regulator-min-microvolt = <3700000>;
|
|
|
|
|
regulator-max-microvolt = <3700000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@4 {
|
|
|
|
|
reg = <4>;
|
|
|
|
|
regulator-compatible = "ldo0";
|
|
|
|
|
regulator-name = "vdd_ldo0,vddio_pex_clk";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@5 {
|
|
|
|
|
reg = <5>;
|
|
|
|
|
regulator-compatible = "ldo1";
|
|
|
|
|
regulator-name = "vdd_ldo1,avdd_pll*";
|
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@6 {
|
|
|
|
|
reg = <6>;
|
|
|
|
|
regulator-compatible = "ldo2";
|
|
|
|
|
regulator-name = "vdd_ldo2,vdd_rtc";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@7 {
|
|
|
|
|
reg = <7>;
|
|
|
|
|
regulator-compatible = "ldo3";
|
|
|
|
|
regulator-name = "vdd_ldo3,avdd_usb*";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@8 {
|
|
|
|
|
reg = <8>;
|
|
|
|
|
regulator-compatible = "ldo4";
|
|
|
|
|
regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@9 {
|
|
|
|
|
reg = <9>;
|
|
|
|
|
regulator-compatible = "ldo5";
|
|
|
|
|
regulator-name = "vdd_ldo5,vcore_mmc";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@10 {
|
|
|
|
|
reg = <10>;
|
|
|
|
|
regulator-compatible = "ldo6";
|
|
|
|
|
regulator-name = "vdd_ldo6,avdd_vdac";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@11 {
|
|
|
|
|
reg = <11>;
|
|
|
|
|
regulator-compatible = "ldo7";
|
2012-09-20 21:20:39 +00:00
|
|
|
regulator-name = "vdd_ldo7,avdd_hdmi";
|
ARM: dt: tegra: harmony: add regulators
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-16 20:59:59 +00:00
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@12 {
|
|
|
|
|
reg = <12>;
|
|
|
|
|
regulator-compatible = "ldo8";
|
|
|
|
|
regulator-name = "vdd_ldo8,avdd_hdmi_pll";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@13 {
|
|
|
|
|
reg = <13>;
|
|
|
|
|
regulator-compatible = "ldo9";
|
|
|
|
|
regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@14 {
|
|
|
|
|
reg = <14>;
|
|
|
|
|
regulator-compatible = "ldo_rtc";
|
|
|
|
|
regulator-name = "vdd_rtc_out,vdd_cell";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
2011-07-19 23:26:54 +00:00
|
|
|
};
|
|
|
|
|
|
2012-05-11 23:03:26 +00:00
|
|
|
pmc {
|
|
|
|
|
nvidia,invert-interrupt;
|
2011-07-19 23:26:54 +00:00
|
|
|
};
|
|
|
|
|
|
2012-05-11 23:32:56 +00:00
|
|
|
usb@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-11 23:03:26 +00:00
|
|
|
usb@c5004000 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2012-05-11 23:03:26 +00:00
|
|
|
nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
|
2011-11-21 21:44:10 +00:00
|
|
|
};
|
|
|
|
|
|
2012-05-11 23:32:56 +00:00
|
|
|
usb@c5008000 {
|
|
|
|
|
status = "okay";
|
2011-11-21 21:44:11 +00:00
|
|
|
};
|
|
|
|
|
|
2011-07-19 23:26:54 +00:00
|
|
|
sdhci@c8000200 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2011-09-20 16:46:25 +00:00
|
|
|
cd-gpios = <&gpio 69 0>; /* gpio PI5 */
|
|
|
|
|
wp-gpios = <&gpio 57 0>; /* gpio PH1 */
|
|
|
|
|
power-gpios = <&gpio 155 0>; /* gpio PT3 */
|
2012-05-14 20:35:04 +00:00
|
|
|
bus-width = <4>;
|
2011-07-19 23:26:54 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000600 {
|
2012-05-11 23:32:56 +00:00
|
|
|
status = "okay";
|
2011-09-20 16:46:25 +00:00
|
|
|
cd-gpios = <&gpio 58 0>; /* gpio PH2 */
|
|
|
|
|
wp-gpios = <&gpio 59 0>; /* gpio PH3 */
|
|
|
|
|
power-gpios = <&gpio 70 0>; /* gpio PI6 */
|
2012-05-14 20:35:04 +00:00
|
|
|
bus-width = <8>;
|
2011-07-19 23:26:54 +00:00
|
|
|
};
|
2012-04-12 21:46:49 +00:00
|
|
|
|
ARM: dt: tegra: harmony: add regulators
Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
couple of fixed GPIO-controlled regulators too.
Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
and converted to Harmony.
swarren made the following changes:
* Added ldo0 regulator configuration to device tree, and updated
board-harmony-pcie.c for the new regulator name.
* Fixed vdd_1v05's voltage from 10.5V to 1.05V.
* Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
run-time from device tree instead of hard-coding it.
* Removed board-harmony{-power.c,.h} now that they're unused.
* Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
this GPIO for now. This will be fixed when the PCIe driver is re-
written as a driver. The code can't regulator_get("vdd_1v05") right
now, because the vdd_1v05 regulator's probe gets deferred due to its
supply being the PMIC, which gets probed after the regulator the first
time around, and this dependency is only resolved by repeated probing,
which happens when deferred_probe_initcall() is called, which happens
in a late initcall, whose runtime order relative to harmony_pcie_init()
is undefined, since that's also called from a late initcall.
* Removed unused harmony_pcie_initcall().
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-08-16 20:59:59 +00:00
|
|
|
regulators {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
vdd_5v0_reg: regulator@0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-name = "vdd_5v0";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-name = "vdd_1v5";
|
|
|
|
|
regulator-min-microvolt = <1500000>;
|
|
|
|
|
regulator-max-microvolt = <1500000>;
|
|
|
|
|
gpio = <&pmic 0 0>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@2 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <2>;
|
|
|
|
|
regulator-name = "vdd_1v2";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
gpio = <&pmic 1 0>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@3 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <3>;
|
|
|
|
|
regulator-name = "vdd_1v05";
|
|
|
|
|
regulator-min-microvolt = <1050000>;
|
|
|
|
|
regulator-max-microvolt = <1050000>;
|
|
|
|
|
gpio = <&pmic 2 0>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
/* Hack until board-harmony-pcie.c is removed */
|
|
|
|
|
status = "disabled";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@4 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <4>;
|
|
|
|
|
regulator-name = "vdd_pnl";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
gpio = <&gpio 22 0>; /* gpio PC6 */
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
regulator@5 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <5>;
|
|
|
|
|
regulator-name = "vdd_bl";
|
|
|
|
|
regulator-min-microvolt = <2800000>;
|
|
|
|
|
regulator-max-microvolt = <2800000>;
|
|
|
|
|
gpio = <&gpio 176 0>; /* gpio PW0 */
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-11 23:03:26 +00:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-wm8903-harmony",
|
|
|
|
|
"nvidia,tegra-audio-wm8903";
|
|
|
|
|
nvidia,model = "NVIDIA Tegra Harmony";
|
|
|
|
|
|
|
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Headphone Jack", "HPOUTR",
|
|
|
|
|
"Headphone Jack", "HPOUTL",
|
|
|
|
|
"Int Spk", "ROP",
|
|
|
|
|
"Int Spk", "RON",
|
|
|
|
|
"Int Spk", "LOP",
|
|
|
|
|
"Int Spk", "LON",
|
|
|
|
|
"Mic Jack", "MICBIAS",
|
|
|
|
|
"IN1L", "Mic Jack";
|
|
|
|
|
|
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
|
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
|
|
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 0>;
|
|
|
|
|
nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
|
|
|
|
|
nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
|
|
|
|
|
nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
|
2012-04-12 21:46:49 +00:00
|
|
|
};
|
2011-07-19 23:26:54 +00:00
|
|
|
};
|
