forked from Minki/linux
284 lines
7.9 KiB
C
284 lines
7.9 KiB
C
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/*
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* Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
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* Copyright(c) 2006 Chris Snook <csnook@redhat.com>
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* Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
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*
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* Derived from Intel e1000 driver
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* Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef _ATL1_H_
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#define _ATL1_H_
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#include <linux/types.h>
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#include <linux/if_vlan.h>
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#include "atl1_hw.h"
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/* function prototypes needed by multiple files */
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s32 atl1_up(struct atl1_adapter *adapter);
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void atl1_down(struct atl1_adapter *adapter);
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int atl1_reset(struct atl1_adapter *adapter);
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s32 atl1_setup_ring_resources(struct atl1_adapter *adapter);
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void atl1_free_ring_resources(struct atl1_adapter *adapter);
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extern char atl1_driver_name[];
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extern char atl1_driver_version[];
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extern const struct ethtool_ops atl1_ethtool_ops;
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struct atl1_adapter;
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#define ATL1_MAX_INTR 3
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#define ATL1_DEFAULT_TPD 256
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#define ATL1_MAX_TPD 1024
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#define ATL1_MIN_TPD 64
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#define ATL1_DEFAULT_RFD 512
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#define ATL1_MIN_RFD 128
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#define ATL1_MAX_RFD 2048
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#define ATL1_GET_DESC(R, i, type) (&(((type *)((R)->desc))[i]))
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#define ATL1_RFD_DESC(R, i) ATL1_GET_DESC(R, i, struct rx_free_desc)
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#define ATL1_TPD_DESC(R, i) ATL1_GET_DESC(R, i, struct tx_packet_desc)
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#define ATL1_RRD_DESC(R, i) ATL1_GET_DESC(R, i, struct rx_return_desc)
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/*
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* Some workarounds require millisecond delays and are run during interrupt
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* context. Most notably, when establishing link, the phy may need tweaking
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* but cannot process phy register reads/writes faster than millisecond
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* intervals...and we establish link due to a "link status change" interrupt.
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*/
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/*
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* wrapper around a pointer to a socket buffer,
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* so a DMA handle can be stored along with the buffer
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*/
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struct atl1_buffer {
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struct sk_buff *skb;
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u16 length;
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u16 alloced;
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dma_addr_t dma;
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};
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#define MAX_TX_BUF_LEN 0x3000 /* 12KB */
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struct atl1_tpd_ring {
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void *desc; /* pointer to the descriptor ring memory */
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dma_addr_t dma; /* physical adress of the descriptor ring */
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u16 size; /* length of descriptor ring in bytes */
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u16 count; /* number of descriptors in the ring */
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u16 hw_idx; /* hardware index */
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atomic_t next_to_clean;
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atomic_t next_to_use;
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struct atl1_buffer *buffer_info;
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};
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struct atl1_rfd_ring {
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void *desc;
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dma_addr_t dma;
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u16 size;
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u16 count;
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atomic_t next_to_use;
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u16 next_to_clean;
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struct atl1_buffer *buffer_info;
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};
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struct atl1_rrd_ring {
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void *desc;
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dma_addr_t dma;
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unsigned int size;
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u16 count;
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u16 next_to_use;
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atomic_t next_to_clean;
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};
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struct atl1_ring_header {
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void *desc; /* pointer to the descriptor ring memory */
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dma_addr_t dma; /* physical adress of the descriptor ring */
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unsigned int size; /* length of descriptor ring in bytes */
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};
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struct atl1_cmb {
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struct coals_msg_block *cmb;
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dma_addr_t dma;
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};
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struct atl1_smb {
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struct stats_msg_block *smb;
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dma_addr_t dma;
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};
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/* Statistics counters */
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struct atl1_sft_stats {
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u64 rx_packets;
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u64 tx_packets;
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u64 rx_bytes;
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u64 tx_bytes;
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u64 multicast;
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u64 collisions;
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u64 rx_errors;
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u64 rx_length_errors;
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u64 rx_crc_errors;
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u64 rx_frame_errors;
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u64 rx_fifo_errors;
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u64 rx_missed_errors;
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u64 tx_errors;
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u64 tx_fifo_errors;
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u64 tx_aborted_errors;
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u64 tx_window_errors;
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u64 tx_carrier_errors;
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u64 tx_pause; /* num Pause packet transmitted. */
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u64 excecol; /* num tx packets aborted due to excessive collisions. */
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u64 deffer; /* num deferred tx packets */
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u64 scc; /* num packets subsequently transmitted successfully w/ single prior collision. */
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u64 mcc; /* num packets subsequently transmitted successfully w/ multiple prior collisions. */
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u64 latecol; /* num tx packets w/ late collisions. */
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u64 tx_underun; /* num tx packets aborted due to transmit FIFO underrun, or TRD FIFO underrun */
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u64 tx_trunc; /* num tx packets truncated due to size exceeding MTU, regardless whether truncated by Selene or not. (The name doesn't really reflect the meaning in this case.) */
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u64 rx_pause; /* num Pause packets received. */
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u64 rx_rrd_ov;
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u64 rx_trunc;
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};
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/* board specific private data structure */
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#define ATL1_REGS_LEN 8
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/* Structure containing variables used by the shared code */
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struct atl1_hw {
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u8 __iomem *hw_addr;
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struct atl1_adapter *back;
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enum atl1_dma_order dma_ord;
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enum atl1_dma_rcb rcb_value;
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enum atl1_dma_req_block dmar_block;
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enum atl1_dma_req_block dmaw_block;
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u8 preamble_len;
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u8 max_retry; /* Retransmission maximum, after which the packet will be discarded */
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u8 jam_ipg; /* IPG to start JAM for collision based flow control in half-duplex mode. In units of 8-bit time */
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u8 ipgt; /* Desired back to back inter-packet gap. The default is 96-bit time */
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u8 min_ifg; /* Minimum number of IFG to enforce in between RX frames. Frame gap below such IFP is dropped */
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u8 ipgr1; /* 64bit Carrier-Sense window */
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u8 ipgr2; /* 96-bit IPG window */
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u8 tpd_burst; /* Number of TPD to prefetch in cache-aligned burst. Each TPD is 16 bytes long */
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u8 rfd_burst; /* Number of RFD to prefetch in cache-aligned burst. Each RFD is 12 bytes long */
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u8 rfd_fetch_gap;
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u8 rrd_burst; /* Threshold number of RRDs that can be retired in a burst. Each RRD is 16 bytes long */
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u8 tpd_fetch_th;
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u8 tpd_fetch_gap;
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u16 tx_jumbo_task_th;
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u16 txf_burst; /* Number of data bytes to read in a cache-aligned burst. Each SRAM entry is
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8 bytes long */
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u16 rx_jumbo_th; /* Jumbo packet size for non-VLAN packet. VLAN packets should add 4 bytes */
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u16 rx_jumbo_lkah;
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u16 rrd_ret_timer; /* RRD retirement timer. Decrement by 1 after every 512ns passes. */
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u16 lcol; /* Collision Window */
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u16 cmb_tpd;
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u16 cmb_rrd;
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u16 cmb_rx_timer;
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u16 cmb_tx_timer;
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u32 smb_timer;
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u16 media_type;
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u16 autoneg_advertised;
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u16 pci_cmd_word;
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u16 mii_autoneg_adv_reg;
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u16 mii_1000t_ctrl_reg;
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u32 mem_rang;
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u32 txcw;
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u32 max_frame_size;
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u32 min_frame_size;
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u32 mc_filter_type;
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u32 num_mc_addrs;
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u32 collision_delta;
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u32 tx_packet_delta;
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u16 phy_spd_default;
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u16 dev_rev;
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u8 revision_id;
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/* spi flash */
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u8 flash_vendor;
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u8 dma_fairness;
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u8 mac_addr[ETH_ALEN];
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u8 perm_mac_addr[ETH_ALEN];
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/* bool phy_preamble_sup; */
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bool phy_configured;
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};
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struct atl1_adapter {
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/* OS defined structs */
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struct net_device *netdev;
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struct pci_dev *pdev;
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struct net_device_stats net_stats;
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struct atl1_sft_stats soft_stats;
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struct vlan_group *vlgrp;
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u32 rx_buffer_len;
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u32 wol;
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u16 link_speed;
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u16 link_duplex;
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spinlock_t lock;
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atomic_t irq_sem;
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struct work_struct tx_timeout_task;
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struct work_struct link_chg_task;
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struct work_struct pcie_dma_to_rst_task;
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struct timer_list watchdog_timer;
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struct timer_list phy_config_timer;
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bool phy_timer_pending;
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bool mac_disabled;
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/* All descriptor rings' memory */
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struct atl1_ring_header ring_header;
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/* TX */
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struct atl1_tpd_ring tpd_ring;
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spinlock_t mb_lock;
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/* RX */
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struct atl1_rfd_ring rfd_ring;
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struct atl1_rrd_ring rrd_ring;
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u64 hw_csum_err;
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u64 hw_csum_good;
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u32 gorcl;
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u64 gorcl_old;
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/* Interrupt Moderator timer ( 2us resolution) */
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u16 imt;
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/* Interrupt Clear timer (2us resolution) */
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u16 ict;
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/* MII interface info */
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struct mii_if_info mii;
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/* structs defined in atl1_hw.h */
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u32 bd_number; /* board number */
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bool pci_using_64;
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struct atl1_hw hw;
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struct atl1_smb smb;
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struct atl1_cmb cmb;
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u32 pci_state[16];
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};
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#endif /* _ATL1_H_ */
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