2019-05-27 06:55:01 +00:00
|
|
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
2007-05-08 04:10:01 +00:00
|
|
|
/*
|
|
|
|
* Copyright 2007 David Gibson, IBM Corporation.
|
|
|
|
*
|
|
|
|
* Based on earlier code:
|
|
|
|
* Copyright (C) Paul Mackerras 1997.
|
|
|
|
*
|
|
|
|
* Matt Porter <mporter@kernel.crashing.org>
|
|
|
|
* Copyright 2002-2005 MontaVista Software Inc.
|
|
|
|
*
|
|
|
|
* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
|
|
|
|
* Copyright (c) 2003, 2004 Zultys Technologies
|
|
|
|
*/
|
|
|
|
#include <stdarg.h>
|
|
|
|
#include <stddef.h>
|
|
|
|
#include "types.h"
|
|
|
|
#include "elf.h"
|
|
|
|
#include "string.h"
|
|
|
|
#include "stdio.h"
|
|
|
|
#include "page.h"
|
|
|
|
#include "ops.h"
|
|
|
|
#include "reg.h"
|
2007-07-30 05:55:02 +00:00
|
|
|
#include "io.h"
|
2007-05-08 04:10:01 +00:00
|
|
|
#include "dcr.h"
|
2007-08-20 12:28:30 +00:00
|
|
|
#include "4xx.h"
|
2007-05-08 04:10:01 +00:00
|
|
|
#include "44x.h"
|
|
|
|
|
|
|
|
static u8 *ebony_mac0, *ebony_mac1;
|
|
|
|
|
2007-07-30 05:55:02 +00:00
|
|
|
#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga"
|
|
|
|
#define EBONY_FPGA_FLASH_SEL 0x01
|
|
|
|
#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash"
|
|
|
|
|
|
|
|
static void ebony_flashsel_fixup(void)
|
|
|
|
{
|
|
|
|
void *devp;
|
|
|
|
u32 reg[3] = {0x0, 0x0, 0x80000};
|
|
|
|
u8 *fpga;
|
|
|
|
u8 fpga_reg0 = 0x0;
|
|
|
|
|
|
|
|
devp = finddevice(EBONY_FPGA_PATH);
|
|
|
|
if (!devp)
|
|
|
|
fatal("Couldn't locate FPGA node %s\n\r", EBONY_FPGA_PATH);
|
|
|
|
|
|
|
|
if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
|
|
|
|
fatal("%s has missing or invalid virtual-reg property\n\r",
|
|
|
|
EBONY_FPGA_PATH);
|
|
|
|
|
|
|
|
fpga_reg0 = in_8(fpga);
|
|
|
|
|
|
|
|
devp = finddevice(EBONY_SMALL_FLASH_PATH);
|
|
|
|
if (!devp)
|
|
|
|
fatal("Couldn't locate small flash node %s\n\r",
|
|
|
|
EBONY_SMALL_FLASH_PATH);
|
|
|
|
|
|
|
|
if (getprop(devp, "reg", reg, sizeof(reg)) != sizeof(reg))
|
|
|
|
fatal("%s has reg property of unexpected size\n\r",
|
|
|
|
EBONY_SMALL_FLASH_PATH);
|
|
|
|
|
|
|
|
/* Invert address bit 14 (IBM-endian) if FLASH_SEL fpga bit is set */
|
|
|
|
if (fpga_reg0 & EBONY_FPGA_FLASH_SEL)
|
|
|
|
reg[1] ^= 0x80000;
|
|
|
|
|
|
|
|
setprop(devp, "reg", reg, sizeof(reg));
|
|
|
|
}
|
|
|
|
|
2007-05-08 04:10:01 +00:00
|
|
|
static void ebony_fixups(void)
|
|
|
|
{
|
|
|
|
// FIXME: sysclk should be derived by reading the FPGA registers
|
|
|
|
unsigned long sysclk = 33000000;
|
|
|
|
|
|
|
|
ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
|
2007-12-21 04:39:31 +00:00
|
|
|
ibm4xx_sdram_fixup_memsize();
|
2008-02-26 00:43:20 +00:00
|
|
|
dt_fixup_mac_address_by_alias("ethernet0", ebony_mac0);
|
|
|
|
dt_fixup_mac_address_by_alias("ethernet1", ebony_mac1);
|
2007-06-13 04:52:59 +00:00
|
|
|
ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
|
2007-07-30 05:55:02 +00:00
|
|
|
ebony_flashsel_fixup();
|
2007-05-08 04:10:01 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void ebony_init(void *mac0, void *mac1)
|
|
|
|
{
|
|
|
|
platform_ops.fixups = ebony_fixups;
|
2007-06-13 04:52:58 +00:00
|
|
|
platform_ops.exit = ibm44x_dbcr_reset;
|
2007-05-08 04:10:01 +00:00
|
|
|
ebony_mac0 = mac0;
|
|
|
|
ebony_mac1 = mac1;
|
2007-12-10 03:28:39 +00:00
|
|
|
fdt_init(_dtb_start);
|
2007-05-08 04:10:01 +00:00
|
|
|
serial_console_init();
|
|
|
|
}
|