2014-01-10 12:52:58 +00:00
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "imx53.dtsi"
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/ {
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memory {
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2014-03-28 05:09:13 +00:00
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reg = <0x70000000 0x20000000>,
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<0xb0000000 0x20000000>;
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2014-01-10 12:52:58 +00:00
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};
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ARM: SoC: device tree changes
A large part of the arm-soc patches are nowadays DT changes, adding support
for new SoCs, boards and devices without changing kernel source. The plan
is still to move the devicetree files out of the kernel tree and reduce
the amount of churn going on here, but we keep finding reasons to delay
doing that.
Changes are really all over the place, with little sticking out particularly.
We have contributions from a total of 116 people in this branch.
Unfortunately, the size of this branch also causes a significant number
of conflicts at the moment, typically when subsystem maintainers merge
patches that change the driver at the same time as the dts files. In
most cases this could be avoided because the dts changes are supposed
to be compatible in both ways, and we are asking everyone to send ARM
dts changes through our tree only.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUz/11WCrR//JCVInAQIIyRAA0DjdNNQ/A4G2i1nZCiTFH6a4oZy4JarN
ATVPkW/V8avhh+yVNe5FWA44Xe6CDC5TXwMaIsbK+w3Iclj3fplh/MsBkQ9ZT9Sl
LAjJoOjuYucCeDy0WLVioRKZ4PJEDoCu/oZTauIMnmWCOCRxLYpOM3FkAT9oN/Ti
lswpTSLiV1/U3ZSI4M3qn+Sx1VJL8c/hAIWbvf5if2diYkWPk3VOSKyxmD9zLWdD
Iqtb79J+ETVeOIM4sHnx79cG4ZCdpOfRAl7qx6hkJu0YATXESxWhpXVE2McTJuzM
qHKsRRNSfsfSWPeF4angll9o06X/qgdT6C4P2dfH49lGeG7llOttw3OaCx3hWCTe
U5bt26qtbwG2ZbzocaqvideP+rbpQrCH2vdO1embPv5Lu6peMoBWjxy6twSVXJBG
LIymJ0IbiGYxL7BReGqRXt6ehy0BDWBeTSTdsGqgEl2TnxHuS/kgGfJc4D5riiEk
aRPVq10p/k+yo4BZtq2GqXIOG6cqkIQ5lhl5Tg9+MfUlquAONqJP70FgRJDBIw9L
9uJp71bgSsA6eYg2tXoqJtpdjKplDWavgtACzIkFg2qFLyYmKvx+F0AXbeTIsrri
/mIchTyG+dgiIjWvj/Xsf7jhrdzRcl3uKsJwFmk927pIsh24HV8T+LKgHrf+sVcO
qEsEnKGYA6s=
=zl/N
-----END PGP SIGNATURE-----
Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree changes from Arnd Bergmann:
"A large part of the arm-soc patches are nowadays DT changes, adding
support for new SoCs, boards and devices without changing kernel
source. The plan is still to move the devicetree files out of the
kernel tree and reduce the amount of churn going on here, but we keep
finding reasons to delay doing that.
Changes are really all over the place, with little sticking out
particularly. We have contributions from a total of 116 people in
this branch.
Unfortunately, the size of this branch also causes a significant
number of conflicts at the moment, typically when subsystem
maintainers merge patches that change the driver at the same time as
the dts files. In most cases this could be avoided because the dts
changes are supposed to be compatible in both ways, and we are asking
everyone to send ARM dts changes through our tree only"
* tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits)
dts: stmmac: Document the clocks property in the stmmac base document
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
ARM: STi: stih41x: Add support for the FSM Serial Flash Controller
ARM: STi: stih416: Add support for the FSM Serial Flash Controller
ARM: tegra: fix Dalmore pinctrl configuration
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot
ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
ARM: dts: bcm21664: Add device tree files.
ARM: DT: bcm21664: Device tree bindings
ARM: efm32: properly namespace i2c location property
ARM: efm32: fix unit address part in USART2 device nodes' names
ARM: mvebu: Enable NAND controller in Armada 385-DB
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
...
2014-04-05 22:29:04 +00:00
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display0: display@di0 {
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2014-01-10 12:52:58 +00:00
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compatible = "fsl,imx-parallel-display";
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interface-pix-fmt = "rgb565";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu_disp0>;
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status = "disabled";
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display-timings {
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claawvga {
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native-mode;
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clock-frequency = <27000000>;
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hactive = <800>;
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vactive = <480>;
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hback-porch = <40>;
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hfront-porch = <60>;
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vback-porch = <10>;
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vfront-porch = <10>;
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hsync-len = <20>;
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vsync-len = <10>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <0>;
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};
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};
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ARM: SoC: device tree changes
A large part of the arm-soc patches are nowadays DT changes, adding support
for new SoCs, boards and devices without changing kernel source. The plan
is still to move the devicetree files out of the kernel tree and reduce
the amount of churn going on here, but we keep finding reasons to delay
doing that.
Changes are really all over the place, with little sticking out particularly.
We have contributions from a total of 116 people in this branch.
Unfortunately, the size of this branch also causes a significant number
of conflicts at the moment, typically when subsystem maintainers merge
patches that change the driver at the same time as the dts files. In
most cases this could be avoided because the dts changes are supposed
to be compatible in both ways, and we are asking everyone to send ARM
dts changes through our tree only.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUz/11WCrR//JCVInAQIIyRAA0DjdNNQ/A4G2i1nZCiTFH6a4oZy4JarN
ATVPkW/V8avhh+yVNe5FWA44Xe6CDC5TXwMaIsbK+w3Iclj3fplh/MsBkQ9ZT9Sl
LAjJoOjuYucCeDy0WLVioRKZ4PJEDoCu/oZTauIMnmWCOCRxLYpOM3FkAT9oN/Ti
lswpTSLiV1/U3ZSI4M3qn+Sx1VJL8c/hAIWbvf5if2diYkWPk3VOSKyxmD9zLWdD
Iqtb79J+ETVeOIM4sHnx79cG4ZCdpOfRAl7qx6hkJu0YATXESxWhpXVE2McTJuzM
qHKsRRNSfsfSWPeF4angll9o06X/qgdT6C4P2dfH49lGeG7llOttw3OaCx3hWCTe
U5bt26qtbwG2ZbzocaqvideP+rbpQrCH2vdO1embPv5Lu6peMoBWjxy6twSVXJBG
LIymJ0IbiGYxL7BReGqRXt6ehy0BDWBeTSTdsGqgEl2TnxHuS/kgGfJc4D5riiEk
aRPVq10p/k+yo4BZtq2GqXIOG6cqkIQ5lhl5Tg9+MfUlquAONqJP70FgRJDBIw9L
9uJp71bgSsA6eYg2tXoqJtpdjKplDWavgtACzIkFg2qFLyYmKvx+F0AXbeTIsrri
/mIchTyG+dgiIjWvj/Xsf7jhrdzRcl3uKsJwFmk927pIsh24HV8T+LKgHrf+sVcO
qEsEnKGYA6s=
=zl/N
-----END PGP SIGNATURE-----
Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree changes from Arnd Bergmann:
"A large part of the arm-soc patches are nowadays DT changes, adding
support for new SoCs, boards and devices without changing kernel
source. The plan is still to move the devicetree files out of the
kernel tree and reduce the amount of churn going on here, but we keep
finding reasons to delay doing that.
Changes are really all over the place, with little sticking out
particularly. We have contributions from a total of 116 people in
this branch.
Unfortunately, the size of this branch also causes a significant
number of conflicts at the moment, typically when subsystem
maintainers merge patches that change the driver at the same time as
the dts files. In most cases this could be avoided because the dts
changes are supposed to be compatible in both ways, and we are asking
everyone to send ARM dts changes through our tree only"
* tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits)
dts: stmmac: Document the clocks property in the stmmac base document
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
ARM: STi: stih41x: Add support for the FSM Serial Flash Controller
ARM: STi: stih416: Add support for the FSM Serial Flash Controller
ARM: tegra: fix Dalmore pinctrl configuration
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot
ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
ARM: dts: bcm21664: Add device tree files.
ARM: DT: bcm21664: Device tree bindings
ARM: efm32: properly namespace i2c location property
ARM: efm32: fix unit address part in USART2 device nodes' names
ARM: mvebu: Enable NAND controller in Armada 385-DB
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
...
2014-04-05 22:29:04 +00:00
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port {
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display0_in: endpoint {
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remote-endpoint = <&ipu_di0_disp0>;
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};
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};
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2014-01-10 12:52:58 +00:00
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};
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gpio-keys {
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compatible = "gpio-keys";
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power {
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label = "Power Button";
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gpios = <&gpio1 8 0>;
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linux,code = <116>; /* KEY_POWER */
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};
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volume-up {
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label = "Volume Up";
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gpios = <&gpio2 14 0>;
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linux,code = <115>; /* KEY_VOLUMEUP */
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gpio-key,wakeup;
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};
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volume-down {
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label = "Volume Down";
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gpios = <&gpio2 15 0>;
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linux,code = <114>; /* KEY_VOLUMEDOWN */
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gpio-key,wakeup;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&led_pin_gpio7_7>;
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user {
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label = "Heartbeat";
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gpios = <&gpio7 7 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p2v: regulator@0 {
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compatible = "regulator-fixed";
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reg = <0>;
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regulator-name = "3P2V";
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regulator-min-microvolt = <3200000>;
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regulator-max-microvolt = <3200000>;
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regulator-always-on;
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};
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reg_usb_vbus: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "usb_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio7 8 0>;
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enable-active-high;
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};
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};
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sound {
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compatible = "fsl,imx53-qsb-sgtl5000",
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"fsl,imx-audio-sgtl5000";
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model = "imx53-qsb-sgtl5000";
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ssi-controller = <&ssi2>;
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audio-codec = <&sgtl5000>;
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audio-routing =
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"MIC_IN", "Mic Jack",
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"Mic Jack", "Mic Bias",
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"Headphone Jack", "HP_OUT";
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mux-int-port = <2>;
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mux-ext-port = <5>;
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};
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1>;
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status = "okay";
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};
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ARM: SoC: device tree changes
A large part of the arm-soc patches are nowadays DT changes, adding support
for new SoCs, boards and devices without changing kernel source. The plan
is still to move the devicetree files out of the kernel tree and reduce
the amount of churn going on here, but we keep finding reasons to delay
doing that.
Changes are really all over the place, with little sticking out particularly.
We have contributions from a total of 116 people in this branch.
Unfortunately, the size of this branch also causes a significant number
of conflicts at the moment, typically when subsystem maintainers merge
patches that change the driver at the same time as the dts files. In
most cases this could be avoided because the dts changes are supposed
to be compatible in both ways, and we are asking everyone to send ARM
dts changes through our tree only.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAUz/11WCrR//JCVInAQIIyRAA0DjdNNQ/A4G2i1nZCiTFH6a4oZy4JarN
ATVPkW/V8avhh+yVNe5FWA44Xe6CDC5TXwMaIsbK+w3Iclj3fplh/MsBkQ9ZT9Sl
LAjJoOjuYucCeDy0WLVioRKZ4PJEDoCu/oZTauIMnmWCOCRxLYpOM3FkAT9oN/Ti
lswpTSLiV1/U3ZSI4M3qn+Sx1VJL8c/hAIWbvf5if2diYkWPk3VOSKyxmD9zLWdD
Iqtb79J+ETVeOIM4sHnx79cG4ZCdpOfRAl7qx6hkJu0YATXESxWhpXVE2McTJuzM
qHKsRRNSfsfSWPeF4angll9o06X/qgdT6C4P2dfH49lGeG7llOttw3OaCx3hWCTe
U5bt26qtbwG2ZbzocaqvideP+rbpQrCH2vdO1embPv5Lu6peMoBWjxy6twSVXJBG
LIymJ0IbiGYxL7BReGqRXt6ehy0BDWBeTSTdsGqgEl2TnxHuS/kgGfJc4D5riiEk
aRPVq10p/k+yo4BZtq2GqXIOG6cqkIQ5lhl5Tg9+MfUlquAONqJP70FgRJDBIw9L
9uJp71bgSsA6eYg2tXoqJtpdjKplDWavgtACzIkFg2qFLyYmKvx+F0AXbeTIsrri
/mIchTyG+dgiIjWvj/Xsf7jhrdzRcl3uKsJwFmk927pIsh24HV8T+LKgHrf+sVcO
qEsEnKGYA6s=
=zl/N
-----END PGP SIGNATURE-----
Merge tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree changes from Arnd Bergmann:
"A large part of the arm-soc patches are nowadays DT changes, adding
support for new SoCs, boards and devices without changing kernel
source. The plan is still to move the devicetree files out of the
kernel tree and reduce the amount of churn going on here, but we keep
finding reasons to delay doing that.
Changes are really all over the place, with little sticking out
particularly. We have contributions from a total of 116 people in
this branch.
Unfortunately, the size of this branch also causes a significant
number of conflicts at the moment, typically when subsystem
maintainers merge patches that change the driver at the same time as
the dts files. In most cases this could be avoided because the dts
changes are supposed to be compatible in both ways, and we are asking
everyone to send ARM dts changes through our tree only"
* tag 'dt-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (541 commits)
dts: stmmac: Document the clocks property in the stmmac base document
dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
ARM: STi: stih41x: Add support for the FSM Serial Flash Controller
ARM: STi: stih416: Add support for the FSM Serial Flash Controller
ARM: tegra: fix Dalmore pinctrl configuration
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
ARM: dts: bcm28155-ap: leave camldo1 on to fix reboot
ARM: dts: add bcm590xx pmu support and enable for bcm28155-ap
ARM: dts: bcm21664: Add device tree files.
ARM: DT: bcm21664: Device tree bindings
ARM: efm32: properly namespace i2c location property
ARM: efm32: fix unit address part in USART2 device nodes' names
ARM: mvebu: Enable NAND controller in Armada 385-DB
ARM: mvebu: Add support for NAND controller in Armada 38x SoC
ARM: mvebu: Add the Core Divider clock to Armada 38x SoCs
ARM: mvebu: Add a 2 GHz fixed-clock on Armada 38x SoCs
...
2014-04-05 22:29:04 +00:00
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&ipu_di0_disp0 {
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remote-endpoint = <&display0_in>;
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};
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2014-01-10 12:52:58 +00:00
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&ssi2 {
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&esdhc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc3>;
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cd-gpios = <&gpio3 11 0>;
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wp-gpios = <&gpio3 12 0>;
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bus-width = <8>;
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status = "okay";
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};
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&iomuxc {
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|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
|
|
|
|
|
|
imx53-qsb {
|
|
|
|
|
pinctrl_hog: hoggrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000
|
|
|
|
|
MX53_PAD_GPIO_8__GPIO1_8 0x80000000
|
|
|
|
|
MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000
|
|
|
|
|
MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000
|
|
|
|
|
MX53_PAD_EIM_DA11__GPIO3_11 0x80000000
|
|
|
|
|
MX53_PAD_EIM_DA12__GPIO3_12 0x80000000
|
|
|
|
|
MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000
|
|
|
|
|
MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000
|
|
|
|
|
MX53_PAD_GPIO_16__GPIO7_11 0x80000000
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
led_pin_gpio7_7: led_gpio7_7@0 {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000
|
|
|
|
|
MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000
|
|
|
|
|
MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000
|
|
|
|
|
MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_esdhc1: esdhc1grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
|
|
|
|
|
MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
|
|
|
|
|
MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
|
|
|
|
|
MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
|
|
|
|
|
MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
|
|
|
|
|
MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_esdhc3: esdhc3grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5
|
|
|
|
|
MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5
|
|
|
|
|
MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5
|
|
|
|
|
MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_fec: fecgrp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
|
|
|
|
|
MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
|
|
|
|
|
MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
|
|
|
|
|
MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
|
|
|
|
|
MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
|
|
|
|
|
MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
|
|
|
|
|
MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
|
|
|
|
|
MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
|
|
|
|
|
MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
|
|
|
|
|
MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000
|
|
|
|
|
MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000
|
|
|
|
|
MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pinctrl_ipu_disp0: ipudisp0grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5
|
|
|
|
|
MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
|
|
|
|
|
MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
|
|
|
|
|
MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5
|
|
|
|
|
MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
2014-04-29 04:59:36 +00:00
|
|
|
pinctrl_vga_sync: vgasync-grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
/* VGA_HSYNC, VSYNC with max drive strength */
|
|
|
|
|
MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
|
|
|
|
|
MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
|
2014-01-10 12:52:58 +00:00
|
|
|
pinctrl_uart1: uart1grp {
|
|
|
|
|
fsl,pins = <
|
|
|
|
|
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
|
|
|
|
|
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
|
|
|
|
|
>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2014-04-29 04:59:36 +00:00
|
|
|
&tve {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_vga_sync>;
|
|
|
|
|
fsl,tve-mode = "vga";
|
|
|
|
|
fsl,hsync-pin = <4>;
|
|
|
|
|
fsl,vsync-pin = <6>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2014-01-10 12:52:58 +00:00
|
|
|
&uart1 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c2 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
sgtl5000: codec@0a {
|
|
|
|
|
compatible = "fsl,sgtl5000";
|
|
|
|
|
reg = <0x0a>;
|
|
|
|
|
VDDA-supply = <®_3p2v>;
|
|
|
|
|
VDDIO-supply = <®_3p2v>;
|
|
|
|
|
clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&i2c1 {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
|
|
|
|
|
accelerometer: mma8450@1c {
|
|
|
|
|
compatible = "fsl,mma8450";
|
|
|
|
|
reg = <0x1c>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&audmux {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_audmux>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&fec {
|
|
|
|
|
pinctrl-names = "default";
|
|
|
|
|
pinctrl-0 = <&pinctrl_fec>;
|
|
|
|
|
phy-mode = "rmii";
|
|
|
|
|
phy-reset-gpios = <&gpio7 6 0>;
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&sata {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&vpu {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usbh1 {
|
|
|
|
|
vbus-supply = <®_usb_vbus>;
|
|
|
|
|
phy_type = "utmi";
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
&usbotg {
|
|
|
|
|
dr_mode = "peripheral";
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
