2005-04-16 22:20:36 +00:00
|
|
|
/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for i486+
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*
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* Written by David Howells (dhowells@redhat.com).
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*
|
2008-01-30 12:30:28 +00:00
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* Derived from asm-x86/semaphore.h
|
2005-04-16 22:20:36 +00:00
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*
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*
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* The MSW of the count is the negated number of active writers and waiting
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* lockers, and the LSW is the total number of active locks
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*
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* The lock count is initialized to 0 (no active and no waiting lockers).
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*
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* When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
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* uncontended lock. This can be determined because XADD returns the old value.
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* Readers increment by 1 and see a positive value when uncontended, negative
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* if there are writers (and maybe) readers waiting (in which case it goes to
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* sleep).
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*
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* The value of WAITING_BIAS supports up to 32766 waiting processes. This can
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|
* be extended to 65534 by manually checking the whole MSW rather than relying
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|
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* on the S flag.
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*
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* The value of ACTIVE_BIAS supports up to 65535 active processes.
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*
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* This should be totally fair - if anything is waiting, a process that wants a
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* lock will go to the back of the queue. When the currently active lock is
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* released, if there's a writer at the front of the queue, then that and only
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* that will be woken up; if there's a bunch of consequtive readers at the
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|
* front, then they'll all be woken up, but no other readers will be.
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|
*/
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|
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|
2008-10-23 05:26:29 +00:00
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|
|
#ifndef _ASM_X86_RWSEM_H
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#define _ASM_X86_RWSEM_H
|
2005-04-16 22:20:36 +00:00
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|
#ifndef _LINUX_RWSEM_H
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#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
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#endif
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|
|
#ifdef __KERNEL__
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|
#include <linux/list.h>
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|
#include <linux/spinlock.h>
|
2006-07-03 07:24:53 +00:00
|
|
|
#include <linux/lockdep.h>
|
2010-01-18 22:00:34 +00:00
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|
|
#include <asm/asm.h>
|
2005-04-16 22:20:36 +00:00
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struct rwsem_waiter;
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|
2008-01-30 12:33:00 +00:00
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|
extern asmregparm struct rw_semaphore *
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rwsem_down_read_failed(struct rw_semaphore *sem);
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|
extern asmregparm struct rw_semaphore *
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|
|
rwsem_down_write_failed(struct rw_semaphore *sem);
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|
|
|
extern asmregparm struct rw_semaphore *
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|
rwsem_wake(struct rw_semaphore *);
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|
extern asmregparm struct rw_semaphore *
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|
|
rwsem_downgrade_wake(struct rw_semaphore *sem);
|
2005-04-16 22:20:36 +00:00
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|
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|
|
/*
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|
|
|
* the semaphore definition
|
2010-01-13 01:57:35 +00:00
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|
*
|
2010-01-18 22:00:34 +00:00
|
|
|
* The bias values and the counter type limits the number of
|
|
|
|
* potential readers/writers to 32767 for 32 bits and 2147483647
|
|
|
|
* for 64 bits.
|
2005-04-16 22:20:36 +00:00
|
|
|
*/
|
2008-03-23 08:03:21 +00:00
|
|
|
|
2010-01-18 22:00:34 +00:00
|
|
|
#ifdef CONFIG_X86_64
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|
|
# define RWSEM_ACTIVE_MASK 0xffffffffL
|
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|
|
#else
|
|
|
|
# define RWSEM_ACTIVE_MASK 0x0000ffffL
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#define RWSEM_UNLOCKED_VALUE 0x00000000L
|
|
|
|
#define RWSEM_ACTIVE_BIAS 0x00000001L
|
|
|
|
#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
|
2005-04-16 22:20:36 +00:00
|
|
|
#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
|
|
|
|
#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
|
2008-03-23 08:03:21 +00:00
|
|
|
|
2010-01-18 22:00:34 +00:00
|
|
|
typedef signed long rwsem_count_t;
|
2010-01-13 01:57:35 +00:00
|
|
|
|
2008-03-23 08:03:21 +00:00
|
|
|
struct rw_semaphore {
|
2010-01-13 01:57:35 +00:00
|
|
|
rwsem_count_t count;
|
2005-04-16 22:20:36 +00:00
|
|
|
spinlock_t wait_lock;
|
|
|
|
struct list_head wait_list;
|
2006-07-03 07:24:53 +00:00
|
|
|
#ifdef CONFIG_DEBUG_LOCK_ALLOC
|
|
|
|
struct lockdep_map dep_map;
|
|
|
|
#endif
|
2005-04-16 22:20:36 +00:00
|
|
|
};
|
|
|
|
|
2006-07-03 07:24:53 +00:00
|
|
|
#ifdef CONFIG_DEBUG_LOCK_ALLOC
|
|
|
|
# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
|
|
|
|
#else
|
|
|
|
# define __RWSEM_DEP_MAP_INIT(lockname)
|
|
|
|
#endif
|
|
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|
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|
|
|
|
2008-03-23 08:03:21 +00:00
|
|
|
#define __RWSEM_INITIALIZER(name) \
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|
|
|
{ \
|
|
|
|
RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \
|
|
|
|
LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) \
|
|
|
|
}
|
2005-04-16 22:20:36 +00:00
|
|
|
|
2008-03-23 08:03:21 +00:00
|
|
|
#define DECLARE_RWSEM(name) \
|
2005-04-16 22:20:36 +00:00
|
|
|
struct rw_semaphore name = __RWSEM_INITIALIZER(name)
|
|
|
|
|
2006-07-03 07:24:53 +00:00
|
|
|
extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
|
|
|
|
struct lock_class_key *key);
|
|
|
|
|
|
|
|
#define init_rwsem(sem) \
|
|
|
|
do { \
|
|
|
|
static struct lock_class_key __key; \
|
|
|
|
\
|
|
|
|
__init_rwsem((sem), #sem, &__key); \
|
|
|
|
} while (0)
|
2005-04-16 22:20:36 +00:00
|
|
|
|
|
|
|
/*
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|
|
|
* lock for reading
|
|
|
|
*/
|
|
|
|
static inline void __down_read(struct rw_semaphore *sem)
|
|
|
|
{
|
2008-03-23 08:03:21 +00:00
|
|
|
asm volatile("# beginning down_read\n\t"
|
2010-01-18 22:00:34 +00:00
|
|
|
LOCK_PREFIX _ASM_INC "(%1)\n\t"
|
2010-07-20 22:19:45 +00:00
|
|
|
/* adds 0x00000001 */
|
2008-03-23 08:03:21 +00:00
|
|
|
" jns 1f\n"
|
|
|
|
" call call_rwsem_down_read_failed\n"
|
|
|
|
"1:\n\t"
|
|
|
|
"# ending down_read\n\t"
|
|
|
|
: "+m" (sem->count)
|
|
|
|
: "a" (sem)
|
|
|
|
: "memory", "cc");
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* trylock for reading -- returns 1 if successful, 0 if contention
|
|
|
|
*/
|
|
|
|
static inline int __down_read_trylock(struct rw_semaphore *sem)
|
|
|
|
{
|
2010-01-13 01:57:35 +00:00
|
|
|
rwsem_count_t result, tmp;
|
2008-03-23 08:03:21 +00:00
|
|
|
asm volatile("# beginning __down_read_trylock\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
|
|
|
" mov %0,%1\n\t"
|
2008-03-23 08:03:21 +00:00
|
|
|
"1:\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
|
|
|
" mov %1,%2\n\t"
|
|
|
|
" add %3,%2\n\t"
|
2008-03-23 08:03:21 +00:00
|
|
|
" jle 2f\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
|
|
|
LOCK_PREFIX " cmpxchg %2,%0\n\t"
|
2008-03-23 08:03:21 +00:00
|
|
|
" jnz 1b\n\t"
|
|
|
|
"2:\n\t"
|
|
|
|
"# ending __down_read_trylock\n\t"
|
|
|
|
: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
|
|
|
|
: "i" (RWSEM_ACTIVE_READ_BIAS)
|
|
|
|
: "memory", "cc");
|
|
|
|
return result >= 0 ? 1 : 0;
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* lock for writing
|
|
|
|
*/
|
2006-07-03 07:24:53 +00:00
|
|
|
static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
|
2005-04-16 22:20:36 +00:00
|
|
|
{
|
2010-01-13 01:57:35 +00:00
|
|
|
rwsem_count_t tmp;
|
2008-03-23 08:03:21 +00:00
|
|
|
asm volatile("# beginning down_write\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
|
|
|
LOCK_PREFIX " xadd %1,(%2)\n\t"
|
2010-07-20 22:19:45 +00:00
|
|
|
/* adds 0xffff0001, returns the old value */
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
|
|
|
" test %1,%1\n\t"
|
2008-03-23 08:03:21 +00:00
|
|
|
/* was the count 0 before? */
|
|
|
|
" jz 1f\n"
|
|
|
|
" call call_rwsem_down_write_failed\n"
|
|
|
|
"1:\n"
|
|
|
|
"# ending down_write"
|
|
|
|
: "+m" (sem->count), "=d" (tmp)
|
2010-07-20 22:19:45 +00:00
|
|
|
: "a" (sem), "1" (RWSEM_ACTIVE_WRITE_BIAS)
|
2008-03-23 08:03:21 +00:00
|
|
|
: "memory", "cc");
|
2005-04-16 22:20:36 +00:00
|
|
|
}
|
|
|
|
|
2006-07-03 07:24:53 +00:00
|
|
|
static inline void __down_write(struct rw_semaphore *sem)
|
|
|
|
{
|
|
|
|
__down_write_nested(sem, 0);
|
|
|
|
}
|
|
|
|
|
2005-04-16 22:20:36 +00:00
|
|
|
/*
|
|
|
|
* trylock for writing -- returns 1 if successful, 0 if contention
|
|
|
|
*/
|
|
|
|
static inline int __down_write_trylock(struct rw_semaphore *sem)
|
|
|
|
{
|
2010-01-13 01:57:35 +00:00
|
|
|
rwsem_count_t ret = cmpxchg(&sem->count,
|
|
|
|
RWSEM_UNLOCKED_VALUE,
|
|
|
|
RWSEM_ACTIVE_WRITE_BIAS);
|
2005-04-16 22:20:36 +00:00
|
|
|
if (ret == RWSEM_UNLOCKED_VALUE)
|
|
|
|
return 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* unlock after reading
|
|
|
|
*/
|
|
|
|
static inline void __up_read(struct rw_semaphore *sem)
|
|
|
|
{
|
2010-07-20 22:19:45 +00:00
|
|
|
rwsem_count_t tmp;
|
2008-03-23 08:03:21 +00:00
|
|
|
asm volatile("# beginning __up_read\n\t"
|
x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
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LOCK_PREFIX " xadd %1,(%2)\n\t"
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2008-03-23 08:03:21 +00:00
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/* subtracts 1, returns the old value */
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" jns 1f\n\t"
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2010-07-20 22:19:45 +00:00
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" call call_rwsem_wake\n" /* expects old value in %edx */
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2008-03-23 08:03:21 +00:00
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"1:\n"
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"# ending __up_read\n"
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: "+m" (sem->count), "=d" (tmp)
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2010-07-20 22:19:45 +00:00
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: "a" (sem), "1" (-RWSEM_ACTIVE_READ_BIAS)
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2008-03-23 08:03:21 +00:00
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: "memory", "cc");
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2005-04-16 22:20:36 +00:00
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}
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/*
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* unlock after writing
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*/
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static inline void __up_write(struct rw_semaphore *sem)
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{
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2010-01-13 01:57:35 +00:00
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rwsem_count_t tmp;
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2008-03-23 08:03:21 +00:00
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asm volatile("# beginning __up_write\n\t"
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x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
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LOCK_PREFIX " xadd %1,(%2)\n\t"
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2010-07-20 22:19:45 +00:00
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/* subtracts 0xffff0001, returns the old value */
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" jns 1f\n\t"
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2010-07-20 22:19:45 +00:00
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" call call_rwsem_wake\n" /* expects old value in %edx */
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2008-03-23 08:03:21 +00:00
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"1:\n\t"
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"# ending __up_write\n"
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x86-32: clean up rwsem inline asm statements
This makes gcc use the right register names and instruction operand sizes
automatically for the rwsem inline asm statements.
So instead of using "(%%eax)" to specify the memory address that is the
semaphore, we use "(%1)" or similar. And instead of forcing the operation
to always be 32-bit, we use "%z0", taking the size from the actual
semaphore data structure itself.
This doesn't actually matter on x86-32, but if we want to use the same
inline asm for x86-64, we'll need to have the compiler generate the proper
64-bit names for the registers (%rax instead of %eax), and if we want to
use a 64-bit counter too (in order to avoid the 15-bit limit on the
write counter that limits concurrent users to 32767 threads), we'll need
to be able to generate instructions with "q" accesses rather than "l".
Since this header currently isn't enabled on x86-64, none of that matters,
but we do want to use the xadd version of the semaphores rather than have
to take spinlocks to do a rwsem. The mm->mmap_sem can be heavily contended
when you have lots of threads all taking page faults, and the fallback
rwsem code that uses a spinlock performs abysmally badly in that case.
[ hpa: modified the patch to skip size suffixes entirely when they are
redundant due to register operands. ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <alpine.LFD.2.00.1001121613560.17145@localhost.localdomain>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2010-01-13 00:21:09 +00:00
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: "+m" (sem->count), "=d" (tmp)
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: "a" (sem), "1" (-RWSEM_ACTIVE_WRITE_BIAS)
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: "memory", "cc");
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2005-04-16 22:20:36 +00:00
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}
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/*
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* downgrade write lock to read lock
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*/
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static inline void __downgrade_write(struct rw_semaphore *sem)
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{
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2008-03-23 08:03:21 +00:00
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asm volatile("# beginning __downgrade_write\n\t"
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2010-01-18 22:00:34 +00:00
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LOCK_PREFIX _ASM_ADD "%2,(%1)\n\t"
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2010-02-13 08:33:12 +00:00
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/*
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* transitions 0xZZZZ0001 -> 0xYYYY0001 (i386)
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* 0xZZZZZZZZ00000001 -> 0xYYYYYYYY00000001 (x86_64)
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*/
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2008-03-23 08:03:21 +00:00
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" jns 1f\n\t"
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" call call_rwsem_downgrade_wake\n"
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"1:\n\t"
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"# ending __downgrade_write\n"
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: "+m" (sem->count)
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2010-02-13 08:33:12 +00:00
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: "a" (sem), "er" (-RWSEM_WAITING_BIAS)
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2008-03-23 08:03:21 +00:00
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: "memory", "cc");
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2005-04-16 22:20:36 +00:00
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}
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/*
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* implement atomic add functionality
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*/
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2010-01-18 22:00:34 +00:00
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static inline void rwsem_atomic_add(rwsem_count_t delta,
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struct rw_semaphore *sem)
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2005-04-16 22:20:36 +00:00
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{
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2010-01-18 22:00:34 +00:00
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asm volatile(LOCK_PREFIX _ASM_ADD "%1,%0"
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2008-03-23 08:03:21 +00:00
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: "+m" (sem->count)
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2010-01-18 22:00:34 +00:00
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: "er" (delta));
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2005-04-16 22:20:36 +00:00
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}
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/*
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* implement exchange and add functionality
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*/
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2010-01-18 22:00:34 +00:00
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static inline rwsem_count_t rwsem_atomic_update(rwsem_count_t delta,
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struct rw_semaphore *sem)
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2005-04-16 22:20:36 +00:00
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{
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2010-01-13 01:57:35 +00:00
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rwsem_count_t tmp = delta;
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2005-04-16 22:20:36 +00:00
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2008-03-23 08:03:21 +00:00
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asm volatile(LOCK_PREFIX "xadd %0,%1"
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: "+r" (tmp), "+m" (sem->count)
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: : "memory");
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2005-04-16 22:20:36 +00:00
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2008-03-23 08:03:21 +00:00
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return tmp + delta;
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2005-04-16 22:20:36 +00:00
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}
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2005-10-30 01:15:44 +00:00
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static inline int rwsem_is_locked(struct rw_semaphore *sem)
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{
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return (sem->count != 0);
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}
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2005-04-16 22:20:36 +00:00
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#endif /* __KERNEL__ */
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2008-10-23 05:26:29 +00:00
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#endif /* _ASM_X86_RWSEM_H */
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