2008-10-23 05:26:29 +00:00
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#ifndef _ASM_X86_PGTABLE_32_H
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#define _ASM_X86_PGTABLE_32_H
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2005-04-16 22:20:36 +00:00
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2009-02-09 02:49:05 +00:00
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#include <asm/pgtable_32_types.h>
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2005-04-16 22:20:36 +00:00
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/*
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* The Linux memory management assumes a three-level page table setup. On
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* the i386, we use that, but "fold" the mid level into the top-level page
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* table, so that we physically have the same two-level page table as the
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* i386 mmu expects.
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*
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* This file contains the functions and defines necessary to modify and use
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* the i386 page table tree.
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*/
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#ifndef __ASSEMBLY__
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#include <asm/processor.h>
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#include <linux/threads.h>
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2006-12-07 01:14:08 +00:00
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#include <asm/paravirt.h>
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2005-04-16 22:20:36 +00:00
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2007-10-19 06:40:25 +00:00
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#include <linux/bitops.h>
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2005-04-16 22:20:36 +00:00
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#include <linux/list.h>
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#include <linux/spinlock.h>
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2005-11-07 08:59:43 +00:00
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struct mm_struct;
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struct vm_area_struct;
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2005-04-16 22:20:36 +00:00
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extern pgd_t swapper_pg_dir[1024];
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2010-08-28 13:58:33 +00:00
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extern pgd_t initial_page_table[1024];
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2016-12-08 16:44:31 +00:00
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extern pmd_t initial_pg_pmd[];
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2005-04-16 22:20:36 +00:00
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2008-03-09 12:14:37 +00:00
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static inline void pgtable_cache_init(void) { }
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static inline void check_pgt_cache(void) { }
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2005-04-16 22:20:36 +00:00
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void paging_init(void);
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/*
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* Define this if things work differently on an i386 and an i486:
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* it will (on an i486) warn about kernel memory accesses that are
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2005-05-01 15:59:08 +00:00
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* done without a 'access_ok(VERIFY_WRITE,..)'
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2005-04-16 22:20:36 +00:00
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*/
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2005-05-01 15:59:08 +00:00
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#undef TEST_ACCESS_OK
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2005-04-16 22:20:36 +00:00
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#ifdef CONFIG_X86_PAE
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# include <asm/pgtable-3level.h>
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#else
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# include <asm/pgtable-2level.h>
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#endif
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#if defined(CONFIG_HIGHPTE)
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2008-03-23 08:03:09 +00:00
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#define pte_offset_map(dir, address) \
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2010-10-26 21:21:52 +00:00
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((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
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2008-03-23 08:03:09 +00:00
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pte_index((address)))
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2010-10-26 21:21:52 +00:00
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#define pte_unmap(pte) kunmap_atomic((pte))
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2005-04-16 22:20:36 +00:00
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#else
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2008-03-23 08:03:09 +00:00
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#define pte_offset_map(dir, address) \
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((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
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2005-04-16 22:20:36 +00:00
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#define pte_unmap(pte) do { } while (0)
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#endif
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2006-10-01 06:29:35 +00:00
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/* Clear a kernel PTE and flush it from the TLB */
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2008-03-23 08:03:09 +00:00
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#define kpte_clear_flush(ptep, vaddr) \
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do { \
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pte_clear(&init_mm, (vaddr), (ptep)); \
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__flush_tlb_one((vaddr)); \
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2006-10-01 06:29:35 +00:00
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} while (0)
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2005-04-16 22:20:36 +00:00
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#endif /* !__ASSEMBLY__ */
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2008-01-30 12:30:37 +00:00
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/*
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* kern_addr_valid() is (1) for FLATMEM and (0) for
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* SPARSEMEM and DISCONTIGMEM
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*/
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2005-06-23 07:07:57 +00:00
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#ifdef CONFIG_FLATMEM
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2005-04-16 22:20:36 +00:00
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#define kern_addr_valid(addr) (1)
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2008-01-30 12:30:37 +00:00
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#else
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#define kern_addr_valid(kaddr) (0)
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#endif
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2005-04-16 22:20:36 +00:00
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2016-12-08 16:44:31 +00:00
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/*
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* This is how much memory in addition to the memory covered up to
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* and including _end we need mapped initially.
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* We need:
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* (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
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* (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
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*
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* Modulo rounding, each megabyte assigned here requires a kilobyte of
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* memory, which is currently unreclaimed.
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*
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* This should be a multiple of a page.
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*
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* KERNEL_IMAGE_SIZE should be greater than pa(_end)
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* and small than max_low_pfn, otherwise will waste some page table entries
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*/
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#if PTRS_PER_PMD > 1
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#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
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#else
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#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
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#endif
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/*
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* Number of possible pages in the lowmem region.
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*
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* We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a
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* gas warning about overflowing shift count when gas has been compiled
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* with only a host target support using a 32-bit type for internal
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* representation.
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*/
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#define LOWMEM_PAGES ((((2<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))
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2008-10-23 05:26:29 +00:00
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#endif /* _ASM_X86_PGTABLE_32_H */
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